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Semiconductor device and method of forming the same

A semiconductor and device technology, applied in the field of semiconductor devices and their formation, can solve problems such as poor performance of semiconductor devices, achieve the effect of improving performance and avoiding leakage

Active Publication Date: 2021-07-13
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the performance of semiconductor devices composed of existing fin field effect transistors is poor

Method used

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  • Semiconductor device and method of forming the same
  • Semiconductor device and method of forming the same
  • Semiconductor device and method of forming the same

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0032] As mentioned in the background, semiconductor devices formed in the prior art have poor performance.

[0033] Figure 1 to Figure 4 It is a structural schematic diagram of the formation process of a semiconductor device.

[0034] combined reference figure 1 and figure 2 , figure 2 The diagram of the first zone in the figure 1 obtained by cutting line N-N1, figure 2 The illustration of the second zone in the figure 1 Obtained by cutting line N2-N3 in the center, a substrate 100 is provided, the substrate 100 includes a first region X and a second region Y, the first region X of the substrate 100 has a first fin 110, and the second region Y of the substrate 100 There is a second fin 111 on the substrate 100, and an isolation structure 101 covering a part of the sidewall of the first fin 110 and a part of the sidewall of the second fin 111 is formed on the substrate 100; A gate structure 120, the first gate structure 120 straddles the first fin 110, covers part...

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Abstract

A semiconductor device and a method for forming the same. The method includes: forming a first side wall film on the side wall of the first gate structure and the second region; And a first planar layer is formed on the isolation structure, the entire top surface of the first planar layer in the first region is lower than the top surface of the first fin; on the surface of the first planar layer, the exposed first side wall film surface, and the second A first filling layer is formed on the fin and the first gate structure, the entire surface of the first filling layer in the first region is higher than the top surface of the first gate structure, and the hardness of the first filling layer is greater than that of the first flat layer ; Form a first photoresist layer on the surface of the first filling layer in the second region, and the first photoresist layer exposes the first filling layer in the first region; use the first photoresist layer as a mask to etch the first The filling layer, the first fin and the first planarization layer form a first recess in the first fin. The method improves the performance of semiconductor devices.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] MOS transistors are one of the most important components in modern integrated circuits. The basic structure of a MOS transistor includes: a semiconductor substrate; a gate structure located on the surface of the semiconductor substrate, a source region located in the semiconductor substrate on one side of the gate structure, and a drain region located in the semiconductor substrate on the other side of the gate structure. The working principle of the MOS transistor is: by applying a voltage to the gate structure, the current through the channel at the bottom of the gate structure is adjusted to generate a switching signal. [0003] With the development of semiconductor technology, the ability of the traditional planar MOS transistor to control the channel current becomes weaker, resultin...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/28H01L29/10H01L29/423H01L29/78
CPCH01L29/1033H01L29/42356H01L29/66795H01L29/785
Inventor 李勇
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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