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Wafer and heat treatment method thereof

A heat treatment method and wafer technology, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as slippage, achieve the effects of improving processing efficiency, increasing minority carrier life, and improving processing effects

Active Publication Date: 2019-05-31
XIAN ESWIN SILICON WAFER TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Conventional defects include 1) cavity defects: such as FDP (Flow Pattern Defect), LSTD (Laser Scattering Tomography Defect), COP, etc.; 2) gap defects: such as LSEPD (Large Secco Etch Pit Defect), LFPD (Large Flow Pattern Defect )Wait
Conventional methods generally choose annealing treatment or rapid heat treatment, but high temperature treatment will cause problems such as slippage
Although there are different heat treatment methods in the existing research, which have achieved a certain treatment effect, how to obtain a single crystal silicon wafer that removes metals such as Fe, reduces slip, and has an excellent DZ area and a high-density BMD area in one heat treatment is a challenge. research questions

Method used

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Experimental program
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Effect test

Embodiment 1

[0061] First place the wafer in an inert atmosphere of argon for pre-insulation treatment, the temperature of the pre-insulation treatment is 500°C, and the time is 30 minutes; the wafer after the pre-insulation treatment is heated up to the first The temperature is 800°C; the wafer is then placed in the first oxidizing atmosphere of oxygen, and the temperature is raised from the first temperature of 800°C to the second temperature of 1000°C at a second temperature increase rate of 3°C / min.

[0062] Place the wafer in a second oxidizing atmosphere, wherein the second oxidizing atmosphere is a mixture of nitrogen and oxygen and the volume ratio of nitrogen and oxygen is 1:1, and the third heating rate is 5°C / min from the second temperature to The temperature is raised from 1000°C to the third temperature of 1200°C; the wafer is placed in an inert atmosphere of argon, and a heat preservation is performed at the third temperature of 1200°C, and the heat preservation time of the fi...

Embodiment 2

[0065] First place the wafer in an inert atmosphere of argon for pre-insulation treatment, the temperature of the pre-insulation treatment is 450°C, and the time is 40min; the wafer after the pre-insulation treatment is heated up to the first The temperature is 750° C.; then the wafer is placed in the first oxidizing atmosphere of oxygen, and the temperature is raised from the first temperature of 750° C. to the second temperature of 1050° C. at a second temperature increase rate of 3° C. / min.

[0066] Place the wafer in a second oxidizing atmosphere, wherein the second oxidizing atmosphere is a mixture of nitrogen and oxygen with a volume ratio of nitrogen and oxygen of 0.7:1, and start from the second temperature at a third heating rate of 6°C / min. The temperature is raised from 1050°C to the third temperature of 1250°C; the wafer is placed in an inert atmosphere of argon, and a heat preservation is carried out at the third temperature of 1250°C, and the heat preservation tim...

Embodiment 3

[0069]First place the wafer in an inert atmosphere of argon for pre-insulation treatment, the temperature of the pre-insulation treatment is 550°C, and the time is 20 minutes; the wafer after the pre-insulation treatment is heated up to the first The temperature is 850° C.; then the wafer is placed in the first oxidizing atmosphere of oxygen, and the temperature is raised from the first temperature of 850° C. to the second temperature of 950° C. at a second heating rate of 1° C. / min.

[0070] Place the wafer in a second oxidizing atmosphere, wherein the second oxidizing atmosphere is a mixture of nitrogen and oxygen with a volume ratio of nitrogen and oxygen of 1.2:1, and start from the second temperature at a third heating rate of 4°C / min. The temperature is raised from 950°C to the third temperature of 1150°C; the wafer is placed in an inert atmosphere of argon, and a heat preservation is carried out at the third temperature of 1150°C, and the heat preservation time of the fi...

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Abstract

The invention provides a wafer and a heat treatment method thereof. The heat treatment method of the wafer comprises the following steps that the wafer is placed in the inert atmosphere for pre thermal insulation; the wafer after pre thermal insulation is heated to first temperature in a first heating rate; the wafer is then placed in first oxidation atmosphere, and heated from the first temperature to second temperature in a second heating rate lower than the first heating rate; the wafer is placed in second oxidation atmosphere, and heated from the second temperature to third temperature ina third heating rate greater than the second heating rate; the wafer is placed in the inert atmosphere and undergoes primary thermal insulation at the third temperature; and after the primary thermalinsulation, the third temperature is cooled to fourth temperature in different cooling rate to implement secondary thermal insulation. According to the wafer obtained via the method, an excellent DZ area and high-density BMD area can be obtained, the minority carrier life is long, the content of gap iron ions is low, and the slip error is low.

Description

technical field [0001] The invention relates to the technical field of wafers, in particular to a wafer heat treatment method and wafers. Background technique [0002] With the successful development of 16M FLASH and 256M DRAM integrating 10 million transistors, the era of ultra-large scale integration (ULSI, Ultra-large Scale Integration) has entered. The rapid growth of ULSI circuit integration mainly depends on the following two factors: first, the perfect crystal growth technology has reached a very high level; second, the continuous improvement of manufacturing equipment, the improvement of processing accuracy, automation and reliability have made the device size enter deep submicron domain. Therefore, larger and more perfect silicon wafers can meet the ultra-small and high-density requirements of ULST. How to avoid defects in large silicon wafers and provide a wafer with an excellent DZ (Denuded Zone) area and a high-density BMD (Bulk Micro Defect) area is very impor...

Claims

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Application Information

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IPC IPC(8): H01L21/324H01L29/06
Inventor 郭恺辰文英熙柳清超张婉婉
Owner XIAN ESWIN SILICON WAFER TECH CO LTD