Semiconductor device and forming method

Abstract

The invention provides a semiconductor device and a forming method. The semiconductor device comprises a semiconductor substrate, a dielectric layer and a conductive plug, wherein the dielectric layeris located on the semiconductor substrate. The dielectric layer comprises a dopant, and the total doping concentration of the dopant in the dielectric layer is gradually reduced in the direction faraway from the surface of the semiconductor substrate. A through hole for exposing the conductive structure is formed in the dielectric layer, and the conductive plug is disposed in the through hole. The total doping concentration of the dopant in the dielectric layer of the semiconductor device provided by the invention is gradually reduced in the direction far away from the semiconductor substrate; due to the fact that the dielectric layer with the large doping concentration can be etched and removed more easily, when the dielectric layer is etched to form the through hole, the etching rate cannot be obviously reduced along with the increase of the etching depth, the bottom appearance of the through hole can be improved, the through hole meeting the requirement is formed, and then the performance of the semiconductor device is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor device and a forming method. Background technique [0002] Through holes are widely used in semiconductor interconnection technology. At present, in the manufacture of semiconductor devices, the method of forming through holes in the dielectric layer is usually to cover the surface of the dielectric layer with photoresist, and use photolithography to define the through holes. size, and then perform dry etching to finally form a through hole, and further fill the through hole with a conductive material to form a conductive plug. [0003] As the semiconductor process advances to a higher generation, it is necessary to set a via hole with a high aspect ratio (High AspectRatio) in the dielectric layer. A high aspect ratio via hole refers to a ratio of hole depth to hole diameter greater than or equal to 2:1. In this In the structure, borophospho-silicate gl...

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Problems solved by technology

However, in the etching process of via holes with high aspect ratio, the etching rate will gradually decrease as the depth of the etched via hole increases, which will cause under-etching at the bottom of the via hole or the bottom of the via hole after the etching is completed. The small size does not meet the size and shape required by the design, and it is easy to make it more difficult to fill the conductive material (such as tungsten) in the via hole later, and even cause a hole to be formed under the via hole

In addition, the narrow bottom of the via hole or the void below the via hole will increase the resistance of the semiconductor device and affect the performance of the device.

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