Field programmable gate array chip and data interaction method

Abstract

The embodiment of the invention discloses a programmable logic gate array chip. The programmable logic gate array chip comprises a dynamic random access memory module and a logic module, wherein the dynamic random access memory module comprises a first substrate and a first metal conductor arranged on the first substrate; the logic module comprises a second substrate and a second metal conductor arranged on the second substrate; wherein a first substrate of the dynamic random access memory module is attached to a second substrate of the logic module, and a first metal conductor of the dynamicrandom access memory module is conducted with a second metal conductor of the logic module; and the dynamic random storage module is used for performing data interaction with the logic module througha path formed by conducting the first metal conductor and the second metal conductor. The embodiment of the invention also discloses a data interaction method.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a field programmable logic gate array chip and a data interaction method. Background technique [0002] Field Programmable Gate Array (Field-Programmable Gate Array, FPGA) is a programmable device. Designers can change and configure the internal connection structure and logic of the device through software tools to achieve rapid development, simulation and testing. [0003] In practical applications, traditional FPGA chips are usually based on a Static Random-Access Memory (SRAM) structure. Such as figure 1 The basic structure of the FPGA chip based on SRAM memory is composed of seven parts, namely: programmable input and output unit (Input Output Block, IOB), basic programmable logic unit (Configurable Logic Block, CLB), clock management module ( Digital Clock Manager, DCM), embedded RAM, rich wiring resources, embedded underlying functional units (not shown in the...

AI Technical Summary

Problems solved by technology

[0004] In practical applications, due to the large number of MOS tubes used in the SRAM components embedded in the FPGA, the FPGA chip occupies a relatively large area and low integration

Moreover, the internal SRAM of the FPGA has limited storage space. When storing large-capacity data, the existing FPGA chip cannot meet the system design requirements. It is necessary to combine the FPGA with an external RAM to complete the storage of large-capacity data. Therefore, the data Transmission takes a lot of time and data processing is slow

Images