A low emi vdmos device with l-type dielectric layer
A dielectric layer, L-shaped technology, applied in the electronic field, to achieve the effect of reducing EMI, reducing circuit volume, and strengthening coupling strength
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[0025] Below in conjunction with accompanying drawing, the technical scheme of the present invention is described in further detail:
[0026] In the prior art, the VDMOS cell structure generally includes a drain metal electrode 101, the drain metal electrode 101 is above the drain N-type heavily doped active region 102, and the drain N-type heavily doped active region 102 is above the N-type heavily doped active region 102. Type lightly doped drift region 103, two source well regions 104 are symmetrically distributed on the upper end of the N-type lightly doped drift region, the upper end of the drift region is covered with gate silicon dioxide 105, and the entire source well region 104 is a P-type lightly doped drift region. Doping, a fourth N-type heavily doped region 106 and a P-type heavily doped region 107 are arranged above the source well region, a portion of the region above the source well region 104 is covered with gate silicon dioxide 105, and the fourth N-type heavi...
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