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Embedded TSV switching chip silicon-based fan-out three-dimensional integrated packaging method and structure

A transfer chip and three-dimensional integration technology, which is applied in the manufacture of electrical components, electric solid-state devices, semiconductor/solid-state devices, etc., can solve problems such as high cost and complex three-dimensional integration process, improve production efficiency, reduce production cost and cycle time Effect

Pending Publication Date: 2019-10-08
58TH RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a silicon-based fan-out three-dimensional integrated packaging method and structure for embedding TSV transfer chips, so as to solve the problem of complex and high-cost traditional three-dimensional integration process using fan-out packaging

Method used

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  • Embedded TSV switching chip silicon-based fan-out three-dimensional integrated packaging method and structure
  • Embedded TSV switching chip silicon-based fan-out three-dimensional integrated packaging method and structure
  • Embedded TSV switching chip silicon-based fan-out three-dimensional integrated packaging method and structure

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Embodiment 1

[0052] The invention provides a silicon-based fan-out three-dimensional integrated packaging method for embedding a TSV transfer chip, the process of which is as follows figure 1 shown, including the following steps:

[0053] Step S11, providing a silicon base, depositing a cut-off layer on the front side; bonding a glass carrier on the cut-off layer;

[0054] Step S12, etching a groove on the back of the silicon substrate, embedding chips in the groove and filling it with dry film material;

[0055] Step S13, opening an opening at the pad of the chip and completing the rewiring on the first surface, and flip-chip welding with the heterogeneous chip through the micro-bump;

[0056] Step S14, plastic sealing the back side of the silicon base so that the side of the chip is completely wrapped, and disassembling the glass carrier to expose the cut-off layer;

[0057] Step S15, removing the cut-off layer, filling the surface with a vacuum-pressed dry film, and opening an opening...

Embodiment 2

[0067] Embodiment 2 of the present invention provides a silicon-based fan-out three-dimensional integrated packaging structure embedded in a TSV transfer chip, such as Figure 15 As shown, a silicon substrate 101 is included, and a groove is opened on the first surface of the silicon substrate 101, and a chip is embedded in the groove. Further, the number of the groove is one or more, the size of the groove is determined according to the size of the chip, and the depth is more than 10 μm; further, one chip is buried in each groove or multiple chips are buried at the same time ; After the chip is embedded, the error between the height of the chip formed and the plane of the silicon base 101 is no more than 5 μm. The gap between the groove and the chip is filled with a dry film material 104, wherein the dry film material 104 is a polymer material including resin and polyimide.

[0068] Specifically, the chips include a TSV transition chip 303 , a TSV transition chip 304 and a h...

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Abstract

The invention discloses an embedded TSV switching chip silicon-based fan-out three-dimensional integrated packaging method and structure, and belongs to the technical field of integrated circuit packaging. Firstly a silicon base is provided and a cut-off layer is deposited on the front surface of the silicon base; a glass carrier plate is bonded on the cut-off layer; a groove is etched on the backsurface of the silicon base, a chip is buried in the groove and the groove is fully filled with a dry film material; then the welding pad of the chip is opened and first surface rewiring is completedand flip-chip bonding is performed with the heterogeneous chip through the micro-bumps; the back surface of the silicon base is molded so that the side surface of the chip is completely wrapped, andthe glass carrier plate is disassembled and the cut-off layer is exposed; then the cut-off layer is removed, the surface is filled with a vacuum pressure-dried film and the welding pad is opened; andfinally the second surface rewiring, the solder resist layer and the bumps are sequentially manufactured and finally the single packaging chip is obtained through cutting so as to complete the final packaging.

Description

technical field [0001] The invention relates to the technical field of integrated circuit packaging, in particular to a silicon-based fan-out three-dimensional integrated packaging method and structure for embedding a TSV transfer chip. Background technique [0002] At present, most electronic products are developing in the direction of lightness, thinness, shortness, and smallness, and manufacturers in the electronics industry are also constantly seeking ways to reduce the size of electronic products. With the development of semiconductor technology, three-dimensional stacked semiconductor device technologies have emerged, such as TSMC's CoWos, InFO and Intel's EMIB. [0003] In recent years, due to the advantages of miniaturization, low cost, and high integration, fan-out wafer-level packaging has attracted a high degree of attention among mobile device manufacturers and other manufacturers. As "Moore Law" reached its physical limit, the era of "More Moore" based on 3D Sy...

Claims

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Application Information

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IPC IPC(8): H01L21/48H01L23/498
CPCH01L21/486H01L23/49827H01L2924/181H01L2224/16225H01L2924/00012
Inventor 王成迁明雪飞吉勇
Owner 58TH RES INST OF CETC
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