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Back-grinding method, substrate wafer and electronic device

A substrate and wafer technology, which is applied in the manufacture of electrical components, semiconductor devices, semiconductor/solid-state devices, etc., can solve problems affecting the efficiency and quality of silicon carbide regrinding processing, semiconductor material warping, and abnormal polishing results. To achieve the effect of shortening the processing procedure, reducing cracking and uniform removal amount

Active Publication Date: 2020-01-03
FUJIAN NORSTEL MATERIAL TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The above-mentioned backgrinding method is very complicated, and there are many factors affecting the polishing process, such as the number of revolutions, pressure, slurry, etc., which will cause abnormal polishing results. In addition, multiple hard processes are required before polishing, such as copper polishing, grinding and other processes, which consume a lot of time. Time control is difficult, and semiconductor materials are prone to warping and cracking during the process, which will affect the efficiency and quality of silicon carbide regrinding processing

Method used

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  • Back-grinding method, substrate wafer and electronic device
  • Back-grinding method, substrate wafer and electronic device
  • Back-grinding method, substrate wafer and electronic device

Examples

Experimental program
Comparison scheme
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Embodiment 1

[0100] The grinding back method includes the following steps:

[0101] 1. Put the silicon carbide wafer in the crystal boat, put the crystal boat into the alkaline cleaning solution for ultrasonic cleaning, the temperature is 60°C, the cleaning time is 40 minutes, and dry after the end;

[0102] 2. Wipe the quartz carrier plate with alcohol and a dust-free cloth, and then place the cleaned silicon carbide wafers one by one on the clean quartz carrier plate;

[0103] 3. Turn on the inductively coupled plasma (ICP) etching machine, transfer the quartz carrier plate into the inductively coupled plasma chamber, and evacuate to 6×10 -3 Pa;

[0104] 4. Induct SF into the inductively coupled plasma chamber 6 The gas performs the first plasma etching, etching for 100 minutes, depending on the thickness of the first etching, and finally injecting O 2 Perform cleaning purge, O 2 The gas flow rate is 5 sccm;

[0105] 5. Take out the silicon carbide wafer and blow it with nitrogen fo...

Embodiment 2

[0116] Grinding back method is the same as embodiment 1, and difference is the conditions of the first plasma etching and the second plasma etching, wherein the conditions of the first plasma etching and the second plasma etching are shown in the following table 2:

[0117] Table 2

[0118] Source power(KW) Bias power(KW) Etching gas flow rate (sccm) first plasma etch 300 50 80 second plasma etch 300 50 80

Embodiment 3

[0120] Grinding back method is the same as embodiment 1, and difference is the conditions of the first plasma etching and the second plasma etching, wherein the conditions of the first plasma etching and the second plasma etching are shown in the following table 3:

[0121] table 3

[0122] Source power(KW) Bias power(KW) Etching gas flow rate (sccm) first plasma etch 1000 200 20 second plasma etch 2000 350 60

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Abstract

The invention provides a back-grinding method, a substrate wafer and an electronic device, and relates to the technical field of semiconductors. The back-grinding method comprises the following stepsof: performing first plasma etching on a to-be-back-ground object by using SF6 as an etching gas; adopting cH4 as an etching gas to carry out second plasma etching on the to-be-back-ground object subjected to the first plasma etching; and carrying out chemical mechanical polishing on the to-be-back-ground object subjected to the second plasma etching. According to the back-grinding method, the machining time can be shortened, the risk that the to-be-back-ground object is broken is reduced, the removal amount of the to-be-back-ground object is small during chemical mechanical polishing, and theeffects of reducing the cost and improving the productivity are achieved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a grinding back method, a substrate wafer and electronic devices. Background technique [0002] Among the substrate materials, such as semiconductor materials, the most common material of the third generation is silicon carbide. The grinding methods of silicon carbide mainly include the following methods: 1. SMD, copper polishing, unloading, cleaning and polishing, and finally cleaning and testing; 2. Crystal grinding machine processing, polishing to remove processing damage, and final cleaning and inspection. The above-mentioned backgrinding method is very complicated, and there are many factors affecting the polishing process, such as the number of revolutions, pressure, slurry, etc., which will cause abnormal polishing results. In addition, multiple hard processes are required before polishing, such as copper polishing, grinding and other processes. Time control is dif...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/306H01L21/3065H01L29/06H01L21/02
CPCH01L21/30625H01L21/3065H01L21/0201H01L21/02013H01L29/06
Inventor 林武庆张洁陈文鹏叶智荃
Owner FUJIAN NORSTEL MATERIAL TECH CO LTD