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Photoelectric calculation unit, photoelectric calculation array and photoelectric calculation method

A computing unit and light-emitting unit technology, applied in optical computing equipment, computing, computers, etc., can solve the problems of unguaranteed device yield and uniformity, and unsupported RRAM.

Active Publication Date: 2020-05-29
NANJING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Typical memory-computing integrated devices are mainly RRAM (memristor) and FLASH (flash memory). RRAM can save the resistance value affected by the input value of its electrical input terminal for a long time after power off, but RRAM does not support Standard CMOS process production, the yield and uniformity of its devices cannot be guaranteed, which is unacceptable in neural network algorithms that must use a large number of memory-computing integrated devices to form a network to accelerate
And if you want to use FLASH as an integrated storage-computing device, it means that a single floating gate tube must store more than one bit of data, that is, multi-value storage, which is a disadvantage for traditional FLASH that can only change the threshold in two ways: erasing and programming. difficult to do

Method used

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  • Photoelectric calculation unit, photoelectric calculation array and photoelectric calculation method
  • Photoelectric calculation unit, photoelectric calculation array and photoelectric calculation method
  • Photoelectric calculation unit, photoelectric calculation array and photoelectric calculation method

Examples

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no. 1 example

[0058] Reference Figure 2 to 5 The optoelectronic calculation unit according to the first embodiment of the present invention is described.

[0059] Such as figure 2 with image 3 As shown in the front view and the three-dimensional view of the optoelectronic computing unit, there is a P-type semiconductor substrate as the photo-generated carrier collection area and the readout area, which is divided into a left collection area and a right readout area, wherein the The collection area on the left is used to apply a pulse with a voltage range of negative voltage on the substrate, or a pulse with a voltage range of positive voltage on the control gate, so that a depletion layer for photoelectron collection is generated in the substrate of the collection area , And read the collected photoelectron quantity through the right readout area as the input quantity of the light input end. The right read area includes shallow trench isolation, N-type drain and N-type source. The shallow ...

no. 2 example

[0106] Reference Figure 6 to 8 The photoelectric calculation unit according to the second embodiment of the present invention is described.

[0107] Such as Image 6 with Figure 7 As shown in the front view and three-dimensional view of the optoelectronic computing unit, there is an N-type semiconductor substrate as a photo-generated carrier collection and readout area, which is divided into a left collection area and a right readout area. The left readout area is used to apply a pulse with a voltage range of positive voltage on the substrate, or apply a pulse with a voltage range of negative voltage on the control gate, so that light holes are generated in the substrate of the collection area The depletion layer is collected, and the collected photo-hole charges are read out through the right readout area; the right readout area includes shallow trench isolation, P-type drain and P-type source. The shallow trench isolation is located between the collection area and the readout...

no. 3 example

[0117] Reference Figure 9 to 12 The photoelectric calculation unit according to the third embodiment of the present invention is described.

[0118] Such as Picture 9 with Picture 10 As shown in the front view and the three-dimensional view of the photoelectric computing unit, there is a P-type semiconductor substrate as the photo-generated carrier collection and readout area, which can undertake the work of photosensitive and readout at the same time, including an N-type drain and An N-type source terminal. The N-type source terminal is located on the side close to the bottom dielectric layer in the readout area and is formed by doping by ion implantation. The N-type drain terminal is located on the other side of the semiconductor substrate close to the bottom dielectric layer opposite to the N-type source terminal, and is also formed by doping by ion implantation. During light exposure, a pulse with a voltage range of negative voltage is applied to the P-type semiconductor ...

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Abstract

The invention relates to a photoelectric calculation unit, a photoelectric calculation array and a photoelectric calculation method, the photoelectric calculation unit comprises a semiconductor multifunctional region structure, and the semiconductor multifunctional region structure comprises at least one carrier control region, at least one coupling region, at least one photon-generated carrier collection region and at least one reading region.

Description

Technical field [0001] The invention relates to a photoelectric calculation unit, a photoelectric calculation array and a photoelectric calculation method. More specifically, the present invention combines some technologies in the computing field and the semiconductor device field, and the technical solution of the present invention can be operated independently or in combination with the current electronic computing technology. Background technique [0002] In principle, existing electronic computers can transmit, add, subtract, and reciprocate specific electrical signals based on semiconductor materials. After unification and integration, extremely complex calculations can be completed. This calculation has in fact constituted an important foundation of modern civilization. [0003] Most of the traditional computers adopt the von Neumann architecture. However, the separation of the storage unit and the operation unit of the von Neumann architecture, when processing a class of al...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06E3/00H01L29/06
CPCG06E3/005H01L29/0684G06N3/067G06N3/08H01L27/14612H01L27/1057G06N3/048G06N3/045G06F15/7896
Inventor 闫锋潘红兵马浩文石东海李张南王宇宣王晨曦陈轩岳涛朱棣罗元勇王子豪娄胜
Owner NANJING UNIV
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