A Global Broadcast Data Input Circuit for Neural Network Processing

A global broadcasting and neural network technology, applied in biological neural network models, physical implementation, climate sustainability, etc., can solve the problem of high bandwidth overhead, improve energy efficiency ratio, reduce additional area overhead and power consumption, and improve data The effect of reusability

Active Publication Date: 2022-05-20
FUDAN UNIV
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AI Technical Summary

Problems solved by technology

For high-concurrency data, the input data can be sent directly to all the computing units in the convolution operation array. As the size of the convolution operation array increases, the bandwidth overhead brought by this direct sending method will be very high.

Method used

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  • A Global Broadcast Data Input Circuit for Neural Network Processing
  • A Global Broadcast Data Input Circuit for Neural Network Processing
  • A Global Broadcast Data Input Circuit for Neural Network Processing

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Embodiment Construction

[0020] In the present invention, the basic block diagram of the global broadcast data input circuit structure is as follows figure 1 shown. The design works as follows:

[0021] The input is the data packet from the storage system and the corresponding data label, which is transmitted to the top-level module for decoding to obtain the current data to be transmitted, the data mask and the end-of-line signal, and the top-level module records the currently received data according to the end-of-line signal The number of data rows, sending the automatic switching signal of the identification number array to the broadcast transmitting unit. The input data and its corresponding data mask and data label are sent to the vertical bus module, copied and sent to the broadcast transmitting unit connected to it at the next level; then the broadcast transmitting module located in the vertical bus module and the horizontal bus module, according to the row data The result of the comparison b...

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Abstract

The invention belongs to the technical field of integrated circuits, in particular to a global broadcast data input circuit for neural network processing. The circuit of the present invention includes: a top-level module for recording data receiving times, a vertical bus module for inputting data broadcasting and transmitting in a vertical direction, a horizontal bus module for inputting data broadcasting and transmitting in a horizontal direction, and a broadcasting transmitting module for selecting a designated computing unit. The circuit uses a two-level bus in the horizontal and vertical directions to cut the data path, while sending data in parallel, it greatly reduces the extra area and power consumption caused by the huge bandwidth in the single bus; at the same time Introduce the operation unit identification number and input data label handshake mechanism in the broadcast transmission module to ensure that the input circuit data transmission function is correct, while improving data multiplexing, reducing the number of circuit memory accesses, and improving the overall energy efficiency of the circuit. The invention can effectively improve the input data transmission efficiency in neural network processing.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a global broadcast data input circuit oriented to neural network processing. Background technique [0002] Neural network algorithms have been well applied in important fields such as computer vision, speech recognition, and robot control. However, various applications have continuously put forward higher requirements for the accuracy and complexity of neural network algorithms, leading to a series of challenges in the implementation of the algorithms. sexual issues. The recent research on neural network processor architecture shows that the array-based parallel spatial processor architecture, with a fixed data flow strategy, and then with a specific data transmission path, can make good use of the high parallelism and internal nature of the neural network algorithm itself. High multiplexing, which greatly reduces the number of data accesses and improves ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06N3/063
CPCG06N3/063Y02D10/00
Inventor 韩军张权张永亮曾晓洋
Owner FUDAN UNIV
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