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Semiconductor device and preparation method thereof, and semiconductor packaging structure

A packaging structure and semiconductor technology, applied in the field of microelectronics, can solve problems affecting the performance and stability of semiconductor devices, and achieve the effects of improving packaging flexibility, improving performance and stability, and reducing parasitic inductance and parasitic resistance.

Active Publication Date: 2020-12-01
GPOWER SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of this, an embodiment of the present invention provides a semiconductor device and its manufacturing method, and a semiconductor packaging structure to solve the technical problem in the prior art that the performance and stability of the semiconductor device are affected by the fact that the electrodes of the semiconductor device are located on the same surface

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  • Semiconductor device and preparation method thereof, and semiconductor packaging structure
  • Semiconductor device and preparation method thereof, and semiconductor packaging structure
  • Semiconductor device and preparation method thereof, and semiconductor packaging structure

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Embodiment Construction

[0051] For purposes of the present invention, technical solutions and advantages clearer, the following examples in conjunction with the accompanying drawings embodiments of the present invention, by way of specific embodiments, fully describe the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, but not all embodiments of the present invention based on the embodiments, those of ordinary skill in all other embodiments obtained in Example without creative work, fall within the scope of the present invention.

[0052] figure 1 It is a schematic cross-sectional structure of a semiconductor device of the prior art, such as figure 1 As shown in the prior art, a source electrode, gate electrode 2 and the drain 3 on the same surface of the semiconductor device, the semiconductor device 1 of the source, from the same surface of the gate electrode 3 and the drain 2 load signal, leading to the interconnection leads more, because the...

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Abstract

The invention discloses a semiconductor device and a preparation method thereof and a semiconductor packaging structure. The semiconductor device includes: a substrate; multiple semiconductor layers which are located on one side of the substrate, wherein two-dimensional electron gas is formed in the multiple semiconductor layers; a first source electrode, a first grid electrode and a first drain electrode which are located on one side of the multiple semiconductor layers and located in an active region of the multiple semiconductor layers, wherein the first grid electrode is located between the first source electrode and the first drain electrode; a gate through hole structure which penetrates through the substrate and the multilayer semiconductor layers; and a gate back contact electrodewhich is positioned on one side, far away from the multilayer semiconductor layers, of the substrate, wherein the first gate is electrically connected with the gate back contact electrode through thegate through hole structure. By arranging the gate through hole structure and the gate back surface contact electrode, a signal can be provided for the first gate from the back surface of the semiconductor device, parasitic inductance and parasitic resistance caused by the semiconductor device in the packaging process are reduced, and the performance and stability of the semiconductor device undera high-frequency switch are improved; and the packaging flexibility of the semiconductor device is improved.

Description

Technical field [0001] Embodiment of the invention relates to the field of microelectronics, in particular, it relates to a semiconductor device and a method for preparing a semiconductor package. Background technique [0002] In the wide-gap semiconductor electronic devices aspect, AlGaN / GaN high electron mobility transistors (High ElectronMobility Transistor, HEMT) having a high concentration two-dimensional electron gas (Two-Dimensional Electron Gas, 2DEG) with a semiconductor device having a high output power density, high temperature, high breakdown voltage characteristics and stability, has great potential in the field of power electronics. [0003] Wherein the device is a lateral GaN HEMT devices, the electrodes are located on the surface, during the packaging process, the lead interconnection length and layout subject to certain restrictions; while interconnected wires caused by parasitic inductance and parasitic resistance affects the high-frequency switch GaN HEMT per...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/778H01L29/423H01L21/335
CPCH01L29/778H01L29/7786H01L29/42316H01L29/66462H01L2224/32145H01L2224/48247H01L2224/48137H01L2224/0603H01L23/49562H01L23/49575H01L23/49531H01L29/2003H01L29/4175H01L23/49506H01L23/4952H01L29/401
Inventor 吴俊峰吴星星
Owner GPOWER SEMICON
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