High-speed photoelectronic device based on polar J-TMDs/beta-Ga2O3 heterojunction and preparation method thereof
An optoelectronic device, -ga2o3 technology, applied in electrical components, semiconductor devices, circuits, etc., can solve problems such as difficult to meet actual needs, achieve the effect of improving fine patterning, achieve precise control, and improve separation and transmission.
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Embodiment 1
[0063] Embodiment 1: Preparation of SiO 2 The thickness of the gate dielectric layer is 150nm substrate; β-Ga 2 o 3 The surface area of the layer is 1 cm 2 , thickness is 60nm; TMDs layer is MoS 2 Materials, the polar J-TMDs layer is a two-dimensional Janus-MoSSe material with a thickness of 1nm; the source and drain electrodes are made of Al metal with a thickness of 100nm based on polar J-TMDs / β-Ga 2 o 3 High-speed optoelectronic devices with heterojunctions.
[0064] refer to image 3 , the implementation steps of this example are as follows:
[0065] Step 1: Pretreatment of SiO 2 / Si substrate substrate.
[0066] 1.1) Choose SiO2 2 Layer thickness 150nm, area 1cm 2 SiO 2 / Si substrate, place the substrate in a beaker and ultrasonically clean it in an acetone solution for 10-20 minutes, then place the substrate in an ethanol solution and clean it for 10-20 minutes to remove residual acetone, and finally clean it ultrasonically in deionized water 5min;
[0067...
Embodiment 2
[0094] Embodiment 2: Preparation of SiO 2 The thickness of the gate dielectric layer is 200nm substrate; β-Ga 2 o 3 The surface area of the layer is 1 cm 2 , with a thickness of 120nm; the TMDs layer is MoSe 2 Materials, the polar J-TMDs layer is a two-dimensional Janus-MoSSe material with a thickness of 1nm; the source and drain electrodes are made of Au metal with a thickness of 120nm based on polar J-TMDs / β-Ga 2 o 3 High-speed optoelectronic devices with heterojunctions.
[0095] refer to Figure 4 , the implementation steps of this example are as follows:
[0096] Step 1: Pretreatment of SiO 2 / Si substrate substrate.
[0097] 1a) Choose SiO2 2 Layer thickness 200nm, area 1cm 2 SiO 2 / Si substrate, place the substrate in a beaker and ultrasonically clean it in an acetone solution for 10-20 minutes, then place the substrate in an ethanol solution and clean it for 10-20 minutes to remove residual acetone, and finally clean it ultrasonically in deionized water 5...
Embodiment 3
[0115] Embodiment 3: Preparation of SiO 2 The thickness of the gate dielectric layer is 300nm substrate; β-Ga 2 o 3 The surface area of the layer is 1 cm 2 , thickness is 180nm; TMDs layer is MoS 2 Materials, the polar J-TMDs layer is a two-dimensional Janus-MoSSe material with a thickness of 1nm; the source and drain electrodes are made of Ti / Au alloy with a thickness of 150nm based on polar J-TMDs / β-Ga 2 o 3 High-speed optoelectronic devices with heterojunctions.
[0116] refer to image 3 , the implementation steps of this example are as follows:
[0117] Step A: Pretreatment of SiO 2 / Si substrate substrate.
[0118] Choose SiO2 2 Layer thickness 300nm, area 1cm 2 SiO 2 / Si substrate, place the substrate in a beaker and ultrasonically clean it in acetone solution for 10-20 minutes; then place the substrate in an ethanol solution and clean it for 10-20 minutes to remove residual acetone, and then ultrasonically clean it in deionized water 5min, and dry the cle...
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