Neural network random number generator sharing circuit, sharing method and processor chip

A technology of random number generator and neural network, which is applied in the direction of random number generator, biological neural network model, electrical digital data processing, etc., and can solve the problem of reduced neural network recognition rate, high non-correlation requirements, and summation result error, etc. question

Pending Publication Date: 2021-04-23
HUBEI UNIV
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Second, the existing technology uses data selectors to complete the addition operation in the network, which has high requirements for the randomness of the gating sequence and the non-correlation between the input bit streams. The cascaded use of the summation result results in continuous accumulation of errors, which greatly reduces the recognition rate of the entire neural network.

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  • Neural network random number generator sharing circuit, sharing method and processor chip
  • Neural network random number generator sharing circuit, sharing method and processor chip
  • Neural network random number generator sharing circuit, sharing method and processor chip

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Embodiment

[0049] The neural network random number generator shared circuit framework based on random calculation proposed by the present invention is as follows: figure 1 shown. In the figure, input data In and output data O u t, the weight parameter W and the offset parameter b are all matrix data, not a single variable. The whole circuit includes a random number module, a bit stream generation module, a random calculation module and a data storage module. The random number module is based on the random number generator circuit, which can generate two random numbers with fixed bit width per clock cycle through the multiplexing circuit, and has good non-correlation; the bit stream generation module is based on the digital comparator circuit, which is used to The traditional binary data is converted into bit stream data; the random computing module contains computing units based on random computing theory, which are used to complete matrix multiplication, matrix convolution and activat...

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Abstract

The invention discloses a neural network random number generator sharing circuit, a sharing method and a processor chip, belongs to the technical field of novel calculation, and is applied to an artificial neural network circuit. The system comprises a random number module, a bit stream generation module, a random calculation module and a data storage module. The random calculation module comprises a plurality of neural calculation units, each neural calculation unit comprises a multiplication circuit, a scaled addition circuit and an activation function circuit, and the scaled addition circuit is based on a parallel accumulator, so that the requirement of an operation circuit on input bit stream non-correlation can be reduced; therefore, the random number generator can be shared in the whole artificial neural network circuit, and one complete neural network only needs one random number generator. Compared with an existing neural network circuit based on random calculation, hardware resources are greatly saved, power consumption is reduced, and meanwhile operation precision is improved.

Description

technical field [0001] The invention belongs to the field of new computing technologies, and in particular relates to a neural network random number generator (Randomnumber generator, RNG) sharing circuit, a sharing method, and a processor chip, in particular to a neural network based on Stochastic Computing (SC) The random number generator shares a circuit and is applied to an artificial neural network (Artificial Neural Network, ANN) circuit. Background technique [0002] With the development of the big data industry and artificial intelligence, the digital signal processing system is becoming more and more complex, which requires a large number of specific operations such as multiplication and addition of floating-point numbers and convolution. Conventional processor chips are less efficient when performing these operations. Execution consumes a lot of energy and cannot support the required large-scale parallel computing requirements. [0003] The random computing circui...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/58G06F7/544G06F7/498G06F17/15G06F17/16G06N3/063G06N3/04
CPCG06F7/584G06F7/588G06F7/5443G06F7/4981G06F17/15G06F17/16G06N3/063G06N3/045
Inventor 段威宋敏
Owner HUBEI UNIV
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