43 results about "Stochastic computing" patented technology

A method for developing and using real time applications for a dynamic system having a sensing subsystem, actuation subsystem, a control subsystem, and an application subsystem utilizes stochastic compute time algorithms. After optimization functions, desired state and constraints are received and detector data has been provided from a sensor subsystem, a statistical optimization error description is generated. From this statistical optimization error description a strategy is developed, including the optimization errors, within the control subsystem. An execution module within the control subsystem then sends an execution strategy to various actuators within the actuation subsystem.

A stochastic calculation engine receives inputs from a semiconductor inspection tool or semiconductor review tool. The stochastic calculation engine determines abnormal locations and pattern variation from the inputs and determines stochastic failures from the inputs. An electronic data storage unit connected with the stochastic calculation engine can include a database with known stochastic behavior and known process metrology variations. The stochastic calculation engine can flag stochastic features, determine a failure rate, or determine fail probability.

The invention discloses a random computing method for an importance degree of a wavelet coefficient of a two-dimensional image. The present method is very rough and is generally used for only dividing foreground and background coefficients or appointing one importance degree to each code block. The random computing method comprises the following steps: firstly, initializing alpha as a 0 matrix and generating a random matrix r, wherein the row number and the line number are consistent with beta and the elements are uniformly distributed on a coordinate (-1, 1); defining beta'=sgn(r)*beta and performing wavelet conversion W on beta', thereby obtaining alpha': alpha'=W(beta'); finally, updating alpha:alphap=max(alphap, absolute value of alphap') and performing p0 on each position; and if alpha no longer changes, ending and outputting alpha. According to the random computing method provided by the invention as a middle step of a JPEG2000 implicit ROI encoding process, the importance degree of each element on an image space is converted into the importance degree of each coefficient on a wavelet domain. According to the random computing method provided by the invention, the more accurate control on the ROI area and importance degree of a JPEG2000 compressed image is realized.

The invention discloses a discrete cosine transform realization method and system based on random calculation, wherein the method includes: mapping an image transformation unit (TU) and a discrete cosine transform (DCT) coefficient to a decimal within a preset range, and then The decimals are converted into a random sequence; the random sequence is converted into a random calculation field sequence, and the random calculation multiplier and the random calculation adder are used for calculation; the calculation result is converted into a two's complement form, thereby realizing discrete cosine transformation. By adopting the method and the system disclosed in the present invention, the hardware consumption can be greatly reduced and the working clock frequency of the system can be improved at the same time.

The present invention relates to the technical field of digital communications, and in particular, to an LDPC decoder based on random bitstream update. The decoder comprises a decoding control unit, an input buffer unit, an information conversion unit, a variable node update unit, a check node update unit, a code word check unit, and a serial output unit. The LDPC decoder is based on the random calculation principle, a variable node unit structure and a check node unit structure are simple, and then the wiring difficulties are reduced. The variable node update structure is used for signal sharing, and the resources occupied by the unit are reduced. Different construction modes are adopted for variable nodes of different degrees, so that the resources of the decoder are less, and the decoding speed is faster. By adopting the decoding optimization strategy of "alternate parameters" and "re-decoding", the decoding performance can be improved. A connection line between two layers of nodes adopts a "half-flooding" technology, and the operation clock frequency and data throughput of the LDPC decoder are effectively improved. By adopting a ''double check'' technology, the decoding convergence speed is faster.

The invention discloses an Internet of Things security gateway, terminal equipment and system capable of shaping traffic. The gateway includes: a traffic statistics module, which is used to obtain and filter data packets sent to a cloud server to obtain a tuple set; a traffic analysis module, which can Calculate the relevant data based on the obtained tuple set; the traffic database is used to store relevant data; the camouflaged traffic calculation module can randomly calculate and select the relevant data in the traffic database according to the time and frequency characteristics, and obtain the camouflaged burst traffic at this moment The decision command of the terminal device; the terminal device interaction module can distribute the decision command of the camouflage burst flow obtained by the camouflage flow calculation module to all connected IoT terminal devices, and notify each IoT terminal device to send simulated data packets; Each analog data packet received does not do any processing, and only sends the relevant ACK packet according to the corresponding protocol. It can improve the security of IoT communication with less analog traffic.

A stochastic calculation engine receives inputs from a semiconductor inspection tool or semiconductor review tool. The stochastic calculation engine determines abnormal locations and pattern variation from the inputs and determines stochastic failures from the inputs. An electronic data storage unit connected with the stochastic calculation engine can include a database with known stochastic behavior and known process metrology variations. The stochastic calculation engine can flag stochastic features, determine a failure rate, or determine fail probability.

A method for quickly forming a Jacobian matrix in power system power flow calculations, comprising: establishing an array Y(n,d) that only stores triangular non-zero elements on the Y array in a random order, and controls the number of non-zero elements with the number of non-zero elements Read and apply; accumulatively calculate the self-admittance of nodes i and j; calculate the mutual admittance of nodes i and j respectively, and calculate S cumulatively according to the number of mutual admittances i ;Write the Y(n,d) array into the data file; read the Y(n,d) data file and randomly calculate the node active current I according to the parameters of the Y(n,d) array pi and reactive current I qi ;According to Y array element and J ij and J ji The corresponding relation of sub-array non-zero element position, use Y(n,d) array element, calculate J array element according to two rows + two columns at the same time; According to I pi , I qi , modify all diagonal elements to form a complete J matrix. The calculation speeds of forming and storing Y-array data files, reading Y-array data files, and forming J-array are greatly superior to those of traditional methods, and the advantages become more obvious with the increase of system scale.

The invention belongs to the technical field of wireless digital communication and broadcasting, in particular to an LDPC decoder based on random calculation. The decoder is based on the random calculation algorithm of the belief propagation algorithm in the probability domain, and its structure includes: a lookup table LUT suitable for the NDS coefficient of the (2048,1723) parity check matrix in the IEEE 802.3an (10GBASE‑T) standard Array, and three hardware structures for accelerating convergence: the initialization module of the hard discriminant counter in the array VN based on the initialization of the lookup table LUT array; After the verification result of the verification node CN reaches a certain stage, the discriminant module output by the initialization array variable node VN is flipped over; at the same time, a new VN node structure is adopted. The invention can further improve the convergence speed of the decoder, improve the throughput rate of the decoder, and provide technical solution support for optical communication whose throughput rate is required to be as high as 100 Gbps in the future.