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Preparation method of silicon surface passivation layer

A passivation layer and silicon surface technology, which is applied in coating, gaseous chemical plating, final product manufacturing, etc., can solve the problems of high cost of energy-consuming equipment and high equipment cost

Pending Publication Date: 2021-06-08
ZHEJIANG UNIV OF TECH
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The existing technology is mainly to prepare SiO 2 , or aSi:H is hydrogenated amorphous silicon as a passivation layer, SiO 2 If the thermal oxidation technology is used, the preparation itself needs a high temperature of more than 800 degrees Celsius, and the preparation of hydrogenated amorphous silicon requires the use of PECVD process equipment, the equipment itself is expensive, and, after the process, the hydrogenated amorphous silicon Annealing at 800 degrees Celsius is required to activate the passivation effect, mainly due to the high cost of energy consumption and equipment

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  • Preparation method of silicon surface passivation layer
  • Preparation method of silicon surface passivation layer
  • Preparation method of silicon surface passivation layer

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Embodiment 1

[0034] Embodiment 1, the preparation of silicon surface passivation layer

[0035] 1. Cleaning

[0036] (1) Immerse the raw silicon wafer (melted silicon wafer in the double-sided polishing area, resistivity 1-5 ohm cm, thickness 280 μm, φ2 inch) into H with a volume ratio of 3:1 2 SO 4 and H 2 o 2 In the mixed solution, heat to 100 degrees Celsius and keep warm for 15 minutes; take out the silicon wafer and rinse it with deionized water for 2 minutes;

[0037] (2) Immerse the silicon wafer cleaned in step (1) in NH with a volume ratio of 1:1:5 4 OH, H 2 o 2 , in a mixed solution of deionized water, heated to 80 degrees Celsius, and kept for 15 minutes; take out the silicon wafer, and rinse it with deionized water for 2 minutes;

[0038] (3) immerse the silicon wafer after step (2) cleaning into HCl, H with a volume ratio of 1:1:5 2 o 2 , in a mixed solution of deionized water, heated to 80 degrees Celsius, and kept for 15 minutes; take out the silicon wafer, and rins...

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Abstract

The invention discloses a preparation method of a silicon surface passivation layer, which comprises the following steps of: cleaning a silicon wafer to remove impurities, and immersing the silicon wafer into an HF aqueous solution with the volume concentration of 10 percent; baking and drying in an N2 environment to obtain a dried silicon wafer; immersing the dried silicon wafer in an HF aqueous solution with the volume concentration of 10-50% for surface group treatment, and cleaning with deionized water to obtain an F-based silicon wafer; and putting the F-based silicon wafer into atomic layer deposition equipment, alternately introducing TiCl4 and H2O at 60-180 DEG C, repeating the steps, and preparing TiOx thin film layers on the front and back surfaces of the silicon wafer, namely, passivation layers. According to the method, silicon surface passivation with long minority carrier lifetime is realized, a high-temperature process in traditional passivation film preparation is avoided, and the minority carrier lifetime of the prepared TiOx passivation silicon wafer can directly reach 1.5-1.8 ms and is prolonged by about 30% compared with the minority carrier lifetime of an annealed TiOx passivation film reported at present.

Description

[0001] (1) Technical field [0002] The invention relates to a method for preparing a silicon surface passivation layer. [0003] (2) Background technology [0004] PERC (Passivated Emitter and Rear Cell), that is, emitter and rear passivation cell technology, was first proposed by Australian scientist Martin Green in 1983, and is currently becoming a new generation of conventional technology for solar cells. The efficiency record of PERC has been continuously refreshed in recent years. PERC technology improves conversion efficiency by preparing a passivation layer on the backlight side of the cell. Higher efficiency levels in standard cell structures are limited by the tendency for photogenerated charge carriers to recombine. [0005] The concept of TOPCon cells was proposed by the Fraunhofer Institute for Solar Energy Systems (Fraunhofer-ISE) in Germany in 2013. There is no essential difference between the front side of TOPCon and conventional N-type solar cells. The core te...

Claims

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Application Information

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IPC IPC(8): H01L31/18H01L31/0216H01L31/068C23C16/40C23C16/455
CPCH01L31/1804H01L31/1868H01L31/02167H01L31/068C23C16/45525C23C16/405Y02E10/547Y02P70/50
Inventor 韦德远丁阳黄志平许颖孙彪武朝磊
Owner ZHEJIANG UNIV OF TECH
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