Method for reducing photoresist poisoning through double-pattern process
A double-pattern and photoresist technology, which is applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as insufficient accuracy of graphic definition, affecting device performance, and failure to meet design requirements, etc.
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no. 1 example
[0031] Such as figure 1 As shown, the present invention provides a kind of method that double patterning process reduces photoresist poisoning, comprises the following steps:
[0032] S1, deposit the first NDC layer, TEOS layer, ULK layer, second NDC layer, first NFDARC layer, TIN layer and second NFDARC layer in sequence according to the designed tape-out process;
[0033] S2, double hard mask exposure, exposure and etching of the first via hole, so that the second NDC layer is exposed on the side wall of the first via hole;
[0034] S3, performing silane plasma treatment;
[0035] S4. Execute the follow-up design tape-out process.
[0036] In addition, it should also be understood that although the terms "first", "second", etc. may be used herein to describe various elements, parameters, components, regions, layers and / or sections, these elements, parameters, components, Regions, layers and / or sections should not be limited by these terms. These terms are only used to di...
no. 2 example
[0038] The invention provides a method for reducing photoresist poisoning by a double patterning process, comprising the following steps:
[0039] S1, such as figure 2 As shown, the first NDC layer, TEOS layer, ULK layer, second NDC layer, first NFDARC layer, TIN layer and second NFDARC layer are sequentially deposited according to the designed tape-out process, and the second NDC layer is used as a hard mask layer ;
[0040] S2, such as image 3 and Figure 4 As shown, double hard mask exposure, exposure and etching of the first heavy via hole, so that the second NDC layer is exposed on the side wall of the first heavy via hole;
[0041] S3, performing silane plasma treatment;
[0042] S4. Execute the follow-up design tape-out process.
[0043]Wherein, the pressure range of the silane plasma treatment is 1torr-3torr, the helium flow rate is 100sccm-1000sccm, the temperature range is 350°C-400°C, and the high-frequency radio frequency range is about 100 watts-1000 watts ...
no. 3 example
[0045] The invention provides a method for reducing photoresist poisoning by a double patterning process, comprising the following steps:
[0046] S1, such as figure 2 As shown, the first NDC layer, TEOS layer, ULK layer, second NDC layer, first NFDARC layer, TIN layer and second NFDARC layer are sequentially deposited according to the designed tape-out process, and the second NDC layer is used as a hard mask layer ;
[0047] S2, such as image 3 with Figure 4 As shown, double hard mask exposure, exposure and etching of the first heavy via hole, so that the second NDC layer is exposed on the side wall of the first heavy via hole;
[0048] S3, performing silane plasma treatment;
[0049] S4. Execute the follow-up design tape-out process.
[0050] Wherein, the silane plasma treatment pressure range is 1 torr, 2 torr or 3 torr, the flow rate of helium is 100 sccm, 200 sccm, 300 sccm, 400 sccm, 500 sccm, 600 sccm, 700 sccm, 800 sccm, 900 sccm or 1000 sccm, the temperature r...
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