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Virtual second-order delta-sigma modulator circuit based on differential difference amplifier

A technology of difference amplifier and modulator, applied in the direction of electrical components, analog conversion, code conversion, etc., can solve the problem of high power consumption of the amplifier, reduce circuit power consumption and area, improve circuit accuracy, and eliminate non-ideal factors Effect

Pending Publication Date: 2021-11-19
TIANJIN UNIVERSITY OF TECHNOLOGY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to achieve higher accuracy, it is necessary to increase the capacitance to reduce noise, but the amplifier needs to consume more power to drive the capacitance

Method used

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  • Virtual second-order delta-sigma modulator circuit based on differential difference amplifier
  • Virtual second-order delta-sigma modulator circuit based on differential difference amplifier
  • Virtual second-order delta-sigma modulator circuit based on differential difference amplifier

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Embodiment Construction

[0035] The present invention will be further described below in conjunction with accompanying drawing:

[0036] like image 3 Shown is the virtual second-order delta-sigma modulator circuit based on the differential difference amplifier proposed by the present invention, which mainly consists of a differential difference operational amplifier A1, sampling capacitors C1, C2, C5, C6, integrating capacitors C3, C4, C7, C8 feedback capacitors C9, C10, C11, C12, switches S1 ~ S48 and a comparator. Where C1=C2=Cs1, C3=C4=Ci1, C5=C6=Cs2, C7=C8=Ci2, C9=C10=Cfb1, C11=C12=Cfb2. The signals of the circuit include: the differential input signal is Vip, Vin, the feedback reference signal is Vrefp, Vrefn, Vrefp is equal to the power supply voltage, Vrefn is equal to the ground voltage of the circuit, and the common mode signal is VCM, which is equal to one-half of the power supply voltage. The binomial non-overlapping clock signals are clk1, clk1d, clk2, clk2d (frequency is Fs, duty cycle i...

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Abstract

A virtual second-order delta-sigma modulator circuit based on a differential difference amplifier relates to the technical field of integrated circuits and is mainly composed of a differential difference operational amplifier A1, feedback capacitors C9, C10, C11 and C12, sampling capacitors C1, C2, C5 and C6, integrating capacitors C3, C4, C7 and C8, switches S1 to S48 and a comparator. By adopting an amplifier multiplexing technology, two-stage integrators can share the same amplifier, so that the function of the two-stage integrator is realized, and the power consumption and the area of the circuit are optimized. However, the charge injection effect can generate an error between the integrating capacitors C3 and C7 to increase noise and harmonic components, so that a differential amplifier is adopted to replace a traditional amplifier in an amplifier multiplexing circuit, under the control of a certain logic signal, mutual isolation between the integrating capacitor in the integrator and the shared input port of the multiplexing amplifier is achieved, the influence of the charge injection effect is reduced, and the circuit precision is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a virtual second-order delta-sigma modulator circuit based on a differential differential amplifier. Background technique [0002] The analog-to-digital converter (ADC) is the key to connect the analog field and the digital field, and is mainly composed of a modulator and a downsampling decimation filter. The delta-sigma modulator has the characteristics of oversampling and noise shaping, and is mainly used in low-speed and high-precision fields, such as high-quality audio equipment, precision instruments and equipment, sensor interfaces, and biological signal measurement. The power consumption of the delta-sigma modulator mainly comes from the amplifier module in the integrator of each stage, and a large power consumption means a larger area. [0003] like figure 1 Shown is a traditional second-order switched capacitor delta-sigma modulator circuit, which consists ...

Claims

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Application Information

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IPC IPC(8): H03M3/00
CPCH03M3/322H03M3/39H03M3/458
Inventor 段权珍林晨曦孟真黄胜明姜懿真
Owner TIANJIN UNIVERSITY OF TECHNOLOGY
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