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Semiconductor device structure and preparation method thereof

A device structure and semiconductor technology, applied in semiconductor devices, electrical solid devices, electrical components, etc., can solve the problems of occupying large silicon surface area, complex integration process, increase in raw material cost, etc., to simplify the manufacturing process, improve switching speed, The effect of improving efficiency and reliability

Pending Publication Date: 2022-02-01
绍兴诺芯半导体科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the above traditional parallel connection method, Schottky diodes will occupy a large amount of silicon surface area, resulting in a significant increase in raw material costs and complex integration processes

Method used

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  • Semiconductor device structure and preparation method thereof
  • Semiconductor device structure and preparation method thereof
  • Semiconductor device structure and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

preparation example Construction

[0065] The present invention also provides a method for preparing the above-mentioned semiconductor device structure, comprising the following steps:

[0066] S1, providing a substrate 101 of a first conductivity type;

[0067] S2, forming an epitaxial layer 102 of the first conductivity type on any surface of the substrate 101 of the first conductivity type;

[0068] S3, forming a gate structure 105 on the surface of the epitaxial layer 102 of the first conductivity type away from the substrate 101 of the first conductivity type;

[0069] S4, forming a well region 103 of the second conductivity type in the epitaxial layer 102 of the first conductivity type;

[0070] S5, forming a source region 104 of the first conductivity type in the well region 103 of the second conductivity type;

[0071] S6, on the side of the gate structure 105 away from the well region 103 of the second conductivity type, the epitaxial layer 102 of the first conductivity type is formed on the surface ...

Embodiment 1

[0089] Embodiment 1 provides a semiconductor device structure, including a strip-shaped array of unit cells arranged in parallel consisting of a plurality of unit cells 10, and each unit cell 10 includes:

[0090] N+ type substrate 101;

[0091] The N-type epitaxial layer 102 is located on the surface of the N+ type substrate 101;

[0092] The gate structure 105 is located on the surface of the N-type epitaxial layer 102 away from the N+ type substrate 101. There are two gate structures 105, which are symmetrically distributed on both sides of the central axis of the single unit cell 10. Each gate Each structure 105 includes a stacked gate oxide layer 1051 and a polysilicon layer 1052, the gate oxide layer 1051 is located on the surface of the N-type epitaxial layer 102 away from the N+ type substrate 101, and the polysilicon layer 1052 is located on the surface of the gate oxide layer 1051 away from the N-type epitaxial layer 102 surfaces;

[0093] The insulating layer 106 ...

Embodiment 2

[0101] The semiconductor device structure provided in Embodiment 2 refers to Embodiment 1, the difference is that the single unit cell 10 also includes a second Schottky contact layer 109, and the second Schottky contact layer 109 is provided on the N-type epitaxial layer 102 Inside, the second Schottky contact layer 109 is formed by the cooperation of the second metal layer 1091 and the N-type epitaxial layer 102, and the central axis of the second Schottky contact layer 109 and the central axis of the first Schottky contact layer 108 coincide.

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Abstract

The invention relates to a semiconductor device structure and a preparation method thereof. A vertical power metal oxide semiconductor field effect transistor provided by the invention comprises: a substrate of a first conductivity type; an epitaxial layer of the first conductivity type; a gate structure; a well region of a second conductivity type; a source region of the first conductivity type; a first Schottky contact layer, which is located on the side, away from the well region of the second conductivity type, of the gate structure and located on the surface, away from the substrate of the first conductivity type, of the epitaxial layer of the first conductivity type or located in the epitaxial layer of the first conductivity type; and a source metal layer and a drain metal layer. The semiconductor device structure has excellent efficiency and stability, and meanwhile, raw material cost is low, and a preparation process is simple and convenient.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a semiconductor device structure and a preparation method thereof. Background technique [0002] Metal oxide semiconductor field effect transistor (MOSFET) is an important semiconductor device, which is widely used in analog circuits and digital circuits. In order to obtain higher efficiency and better stability of metal oxide semiconductor field effect transistors, Usually a Schottky diode is connected in parallel between the source and drain of the MOSFET. [0003] There are three traditional parallel methods, which are: (1) installing the Schottky diode and the metal oxide semiconductor field effect transistor in parallel on the circuit board; (2) connecting the Schottky chip and the metal oxide semiconductor field effect transistor chip Parallel packaging in the same semiconductor device, relying on wire bonding to achieve parallel connection; (3) Design metal oxide s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/07H01L29/06
CPCH01L27/0727H01L29/0688
Inventor 徐吉程潘群华
Owner 绍兴诺芯半导体科技有限公司