Semiconductor structure and forming method thereof, and semiconductor device and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof, and a semiconductor device and a forming method thereof, and the forming method of the semiconductor structure comprises the steps: providing a substrate, forming a well region and a drift region which are adjacent in the substrate of the substrate, forming a gate structure on the substrate at the junction of the well region and the drift region, and forming a pseudo gate structure on the substrate of the drift region; forming a drain region in the drift region at one side, far away from the gate structure, of the pseudo gate structure, wherein the projections of the pseudo gate structure and the drain region in the direction perpendicular to the substrate are intersected or partially overlapped; forming an isolating layer, wherein the isolating layer is at least located between the gate structure and the pseudo gate structure and makes contact with the gate structure and the pseudo gate structure, and the thickness of the isolating layer located between the gate structure and the pseudo gate structure is smaller than that of the pseudo gate structure; and forming a conductive structure on the isolating layer, wherein the conductive structure at least covers adjacent side walls of the pseudo gate structure and the gate structure. Therefore, the breakdown voltage of the semiconductor structure is improved on the basis that the technological process does not need to be increased.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same, and a semiconductor device and method for forming the same. Background technique [0002] With the rapid development of power integrated circuits, the research and development of power semiconductor devices is becoming more and more important. LDMOS is a lateral high-voltage device of DMOS devices. It has the advantages of high withstand voltage, large gain, low distortion, etc., and is more compatible with CMOS technology, so it has been widely used in radio frequency integrated circuits. At present, the focus of LDMOS design is how to reasonably ease the contradiction between breakdown voltage and on-resistance, and ensure its high stability. Field plate technology is the most frequently used termination technology in power LDMOS devices. [0003] However, the introduction of fie...

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Problems solved by technology

[0003] However, the introduction of field plates still has the problem of poor electrical performance of semiconductor structures

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