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Shield gate groove type field effect transistor of groove type source electrode and preparation method of shield gate groove type field effect transistor

A field effect transistor and shielded gate technology, which is applied in the field of shielded gate trench type field effect transistor and its preparation, can solve the problems of limiting the avalanche capability of the device, increasing the cost of the device, and consuming the area of ​​the silicon wafer, so as to improve the avalanche capability and save energy. Device cost, the effect of reducing silicon area

Pending Publication Date: 2022-03-11
无锡先瞳半导体科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] One is that the structure consumes a certain area of ​​silicon wafers. In order to ensure that the P-type source region has sufficient area for short-circuiting, the area of ​​the P-type source region must be introduced; or in order to ensure that the P-type source region and the N-type source region The area of ​​the region leads to a large silicon chip area and a corresponding increase in device cost; secondly, under this structure, when the transistor is in the forward high voltage blocking or forward high voltage conduction, holes are generated due to the avalanche effect, and the holes The hole will flow through the channel of the substrate region to form a hole current sufficient to turn on the parasitic triode, trigger the triode to turn on, and limit the avalanche capability of the device

Method used

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  • Shield gate groove type field effect transistor of groove type source electrode and preparation method of shield gate groove type field effect transistor
  • Shield gate groove type field effect transistor of groove type source electrode and preparation method of shield gate groove type field effect transistor
  • Shield gate groove type field effect transistor of groove type source electrode and preparation method of shield gate groove type field effect transistor

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Experimental program
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Effect test

Embodiment 1

[0048] Both the P-type source region and the N-type source region in the traditional structure are made on the surface of the silicon wafer in the transistor. There are two problems in this structure:

[0049]One is that the structure consumes a certain area of ​​silicon wafers. In order to ensure that the P-type source region has enough area for short-circuiting, the area of ​​the N-type source region must be sacrificed; or in order to ensure that the P-type source region and the N-type source region The area of ​​the area is large, resulting in a large area of ​​silicon wafers and a corresponding increase in device cost; secondly, under this structure, when the transistor is in the forward high voltage blocking or forward high voltage conduction, holes are generated due to the avalanche effect, and the holes The holes will flow through the channel in the base region to form a hole current sufficient to turn on the parasitic triode, triggering the triode to turn on.

[0050] ...

Embodiment 2

[0068] Based on the shielded gate trench field effect transistor with a trenched source shown in the first embodiment above, the embodiment of the present application provides another structure of a shielded gate trenched field effect transistor with a trenched source, which can be compared with Impurity compensation is performed in the body region to improve the avalanche capability of the transistor.

[0069] The technical solutions of the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0070] figure 2 It is another structural schematic diagram of a shielded gate trench field effect transistor with a trench source shown in the embodiment of the present application.

[0071] see figure 2 , the shielded gate trench field effect transistor of the trench source, comprising:

[0072] Substrate region 1, drift region 2, base region 3, N-type source region 4, shield gate 5, control gate 6, insulating layer 7, ...

Embodiment 3

[0082] Corresponding to the shielded gate trench field effect transistor with grooved source described in the first embodiment, the present application also provides a method for manufacturing a shielded gate trenched field effect transistor with grooved source and the corresponding Example.

[0083] image 3 It is a schematic flowchart of a method for manufacturing a trench-type source shielded-gate trench field-effect transistor shown in an embodiment of the present application.

[0084] see image 3 , the preparation method of the shielded gate trench field effect transistor of the trench source, comprising:

[0085] 301. Prepare a substrate region with a semiconductor material;

[0086] In the embodiment of the present application, the semiconductor material used is an N-type heavily doped semiconductor material.

[0087] 302. Epitaxially forming a drift region on the substrate region;

[0088] In the embodiment of the present application, different epitaxial processes ...

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Abstract

The invention relates to a shield gate trench type field effect transistor with a trench type source electrode. The shield gate trench type field effect transistor comprises a substrate region, a drift region, a matrix region, an N-type source region, a shield gate, a control gate, an insulating layer, the trench type source electrode, a drain electrode and a metal gate electrode, the drift region is connected with the substrate region, and the matrix region and the N-type source region are sequentially arranged above the drift region; the control gate and the shield gate are sequentially arranged on the side of the drift region from top to bottom and are respectively connected with the drift region, the matrix region and the N-type source region through insulating layers; the groove type source electrode comprises a horizontal source electrode part and a vertical source electrode part, and the vertical source electrode part is connected to one end of the horizontal source electrode part to form a source electrode with an L-shaped longitudinal section; the horizontal source electrode part is arranged above the N-type source region, and the vertical source electrode part is connected with the side surfaces of the N-type source region and the matrix region, so that the corner of the N-type source region is attached to the corner of the groove-type source electrode; the drain electrode is arranged below the substrate region; and the metal gate is arranged above the control gate. According to the scheme provided by the invention, the avalanche capability of the device can be improved.

Description

technical field [0001] The present application relates to the field of semiconductor technology, in particular to a shielded gate trench field effect transistor with a trench source and a preparation method thereof. Background technique [0002] Shielded gate trench field effect transistor SGT has been widely used in important low-voltage fields such as power management. This is because the SGT has a high channel density and has a good charge compensation effect. In addition, its shielded gate structure can significantly reduce the transmission capacitance because it effectively isolates the coupling between the metal gate and the drain. This makes SGT have lower specific on-resistance, smaller conduction and switching losses, and higher operating frequency. [0003] In the related art, in order to suppress the floating effect of the substrate region, a heavily doped P-type source region needs to be used to short-circuit the base region and the N-type source region connect...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/08H01L29/417H01L29/78H01L21/336
CPCH01L29/0615H01L29/0847H01L29/41766H01L29/41741H01L29/7827H01L29/7831H01L29/66484H01L29/66666
Inventor 张子敏王宇澄虞国新吴飞钟军满
Owner 无锡先瞳半导体科技有限公司
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