Same-layer gate-all-around nanowire/sheet CMOS (Complementary Metal Oxide Semiconductor) structure

Abstract

The invention discloses a same-layer ring gate nanowire / sheet CMOS (Complementary Metal-Oxide-Semiconductor Transistor) structure, which comprises a substrate; an nMOS and a pMOS which are connected in series are arranged on the substrate; the nMOS comprises a first nano-body structure and a first gate electrode surrounding the first nano-body structure, and the pMOS comprises a second nano-body structure and a second gate electrode surrounding the second nano-body structure; the first nano-body structure and the second nano-body structure are arranged on the same layer; the conductive layers are made of semiconductor materials of the same conductive type; the first gate electrode and the second gate electrode are made of conductive materials with the same work function; the substrate material is bulk Si or SOI; the first nanometer body structure and the second nanometer body structure are both made of Si. The nanobodies of the nMOS and the pMOS are made of semiconductor materials of the same conductive type, and the gate electrodes are made of conductive materials of the same work function, so that the nanobodies can be prepared at the same time, and the performance and reliability of the CMOS structure and the integrated circuit thereof can be improved.

Description

Technical field [0001] The present invention belongs to the semiconductor technology, and more particularly to a co-layer grating nanowire / sheet CMOS structure. Background technique [0002] As the integrated circuit feature size breaks through 10 nm, short channel effects and leak barrier reduction effects make transistor properties unstable. At the same time, the leakage current is significantly increased due to quantum tunneling effect, so that the performance of the entire device is further deteriorated. Moreover, the process is more complicated during the preparation of the transistor under this size, which makes the development of Moore's laws and strokes. [0003] In order to suppress short channel effects, researchers have proposed a variety of nano-devices structures, including double gates, three gates, π-grids, S-ranging grids, Ω rigages, and gratings, which are MOSFETs (METAL-OXIDE) -Semiconductor Field-Effect Transistor, Metal-Oxide Semiconductor Field Effect Trans...

AI Technical Summary

Problems solved by technology

[0005] However, the gate-all-around nanowire / sheet field effect transistor still has problems such as many manufacturing process steps, complicated technology, and higher cost than conventional CMOS.

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