SiC substrate, SiC epitaxial substrate, SiC crystal ingot, and method for producing same

A manufacturing method and substrate technology, applied in chemical instruments and methods, semiconductor/solid-state device manufacturing, crystal growth, etc., can solve problems such as work performance and reliability impact

Pending Publication Date: 2022-04-19
KWANSEI GAKUIN EDUCTIONAL FOUND +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, there are cases where the existence of step bunching has a fatal effect on operation performance and reliability in a MOSFET in which an oxide film is formed at the surface of the epitaxial layer and its interface is electrified

Method used

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  • SiC substrate, SiC epitaxial substrate, SiC crystal ingot, and method for producing same
  • SiC substrate, SiC epitaxial substrate, SiC crystal ingot, and method for producing same
  • SiC substrate, SiC epitaxial substrate, SiC crystal ingot, and method for producing same

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0322] Embodiment 1 is an embodiment specifically illustrating the etching focusing step S111. Embodiment 2 is an embodiment specifically illustrating the etching beam removal step S121. Embodiment 3 is an embodiment specifically illustrating the growth beam removal step S122. Embodiment 4 is an embodiment specifically illustrating the basal plane dislocation reduction step S13.

Embodiment 5

[0323] Example 5 is an example specifically illustrating a crystal growth step for forming a voltage-resistant layer.

[0324]

[0325] The SiC original substrate 10 is accommodated in the main body container 20 and the high melting point container 40 (refer to Figure 9 ), and perform heat treatment under the following heat treatment conditions, thereby removing the strained layer 101 of the SiC original substrate 10 .

[0326] [SiC primary substrate 10]

[0327] Polymorph: 4H-SiC

[0328] Substrate size: width 10mm x width 10mm x thickness 0.45mm

[0329] Deviation direction and deviation angle: direction 4° deviation

[0330] Etched surface: (0001) crystal plane

[0331] Depth of strained layer 101: 5 μm

[0332] In addition, the depth of the strained layer 101 was confirmed by the SEM-EBSD method. In addition, this strained layer 101 can also be confirmed by TEM, μXRD, and Raman spectroscopy.

[0333] [Main container 20]

[0334] Material: Polycrystalline SiC

...

Embodiment 2

[0371]

[0372] The SiC original substrate 10 is accommodated in the main body container 20 and the high melting point container 40 (refer to Figure 11 ), and heat treatment was performed under the following heat treatment conditions, whereby the MSB on the surface of the SiC original substrate 10 was removed.

[0373] [SiC primary substrate 10]

[0374] Polymorph: 4H-SiC

[0375] Substrate size: width 10mm x width 10mm x thickness 0.3mm

[0376] Deviation direction and deviation angle: direction 4° deviation

[0377] Etched surface: (0001) crystal plane

[0378] With or without MSB: Yes

[0379] In addition, the step height, platform width, and the presence or absence of MSB can be confirmed by an atomic force microscope (AFM) or a scanning electron microscope (SEM) image contrast evaluation method described in JP-A-2015-179082.

[0380] [Main container 20]

[0381] Material: Polycrystalline SiC

[0382] Container size: diameter 60mm x height 4mm

[0383] Material...

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Abstract

The technical problem to be solved by the invention is to provide a novel technology capable of realizing a high-quality SiC substrate, a high-quality SiC epitaxial substrate and a high-quality SiC crystal ingot. The present invention is a method for manufacturing a SiC substrate (11), the method having a heat treatment step (S1) for heat-treating a SiC original substrate (10), the heat treatment step (S1) including at least two of the following steps (a), (b), and (c): (a) a strained layer removal step (S11) for removing a strained layer (101) of the SiC original substrate (10); (b) a bunching removal step (S12) of removing macroscopic step bunching (MSB) on the SiC original substrate (10); and (c) a base surface dislocation reduction step (S13) in which a growth layer (105) having reduced base surface dislocation (BPD) is formed on the SiC original substrate (10).

Description

technical field [0001] The invention relates to high-quality SiC substrates, SiC epitaxial substrates, SiC crystal ingots and their manufacturing methods. Background technique [0002] SiC (silicon carbide) semiconductor devices have higher withstand voltage and higher efficiency than Si (silicon) or GaAs (gallium arsenide) semiconductor devices, and can work at high temperatures, so they are being developed for industrialization. [0003] However, many crystal defects and dislocations still exist at SiC epitaxial substrates obtained by growing SiC substrates or SiC epitaxial layers (hereinafter referred to as epitaxial layers), which adversely affect the characteristics of SiC semiconductor devices. [0004] For example, a basal plane dislocation (BPD) in an epitaxial layer propagates into a stacking defect when causing a SiC semiconductor device to perform ambipolar operation. Since this stacking defect increases the turn-on voltage of the SiC semiconductor device and cau...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C30B29/36C30B33/02C30B25/20H01L21/205
CPCH01L21/205C30B29/36C30B33/02C30B25/20C30B25/186H01L21/02631H01L21/02378H01L21/02658H01L21/02529H01L21/02019C30B33/12H01L21/02002
Inventor 金子忠昭
Owner KWANSEI GAKUIN EDUCTIONAL FOUND
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