High-voltage MOSFET transistor terminal structure and preparation method thereof
A terminal structure and transistor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., to achieve high efficiency, reduce curvature, and reduce electric field strength
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0044] Specifically, coating a photoresist with a thickness of about 7000-12000Å, exposing and developing to form the second conductive N+ doped region window region, and wet etching to clean the thermal oxide layer 9 in the second conductive N+ doped region window region , so that the silicon in the epitaxial layer 10 is exposed. Then, a second conductive doped N+ impurity is implanted into the above exposed window by semiconductor-specific implantation and doping equipment to form a terminal cut-off region. Remove the photoresist implanted outside the doping window through wet and dry processes, and form a terminal cut-off region for the above through a high-temperature furnace tube, and diffuse the above-mentioned impurities at a certain temperature and time to form a stop ring 5 and an N+ cut-off region.
[0045] S5 , a plurality of polycrystalline field plates 3 are formed on the oxide layer 9 .
[0046] Specifically, N+ doped polysilicon with a thickness of 2000-12000Å ...
PUM
| Property | Measurement | Unit |
|---|---|---|
| thickness | aaaaa | aaaaa |
Abstract
Description
Claims
Application Information
Login to View More 


