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QFN chip packaging technique

A chip packaging and process technology, applied in the direction of electrical components, electrical solid devices, semiconductor/solid device manufacturing, etc., can solve the problems of reducing blade life, pollution of the frame and chip bonding area, high price, etc., to improve welding quality, lead The effect of convenient foot exposure and low material cost

Active Publication Date: 2007-01-31
DIODES SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] 1. A special high-temperature-resistant film needs to be pasted on the back of the frame. Due to high temperature heating during use, the film on the back will emit harmful chemicals, which will cause pollution to the frame and chip bonding area, affect the quality of the welding process, and affect the quality of the product
[0004] 2. The cost of the back film is high, and the frame uses PPF technology, which leads to a higher price of the frame than the general frame, thereby increasing the cost of the overall package
Cause product lead edge curling, reduce blade life, affect product quality and SMT quality
[0006] 4. During plastic packaging, the frame pins are as flat as the bottom of the plastic packaging compound, and the soldering ability is not good when surface mounting

Method used

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Embodiment Construction

[0037] Referring to accompanying drawing 1, Fig. 1a is a top view of the new frame, Fig. 1b is a back view of the frame, and Fig. 1c is a cross-sectional view of the frame; the number 1 in Fig. 1a is a chip pad. Accompanying drawing 2 is coated with silver glue 2 on the chip pad 1 . Accompanying drawing 3 is on the silver glue 2, sticks chip 3, then completes curing operation. Accompanying drawing 4 is to carry out gold wire 4 bonding according to the characteristic of product. Accompanying drawing 5 is that the bonded product is sealed according to the characteristics of the molding compound. 5 is the outer layer of molding compound. After packaging, the metal lead frame 6 needs to be peeled off to expose the bottom pin metal, as shown in Figure 6 .

[0038] See accompanying drawing 8, wherein: Fig. 8a is a top view of the product after cutting into independent devices; Fig. 8b is a back view of Fig. 8a; Fig. 8c is an internal structure diagram of an independent product dev...

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Abstract

The invention offers new type QFN chip packaging technology. It includes the following steps: pressing metal sheet to form lead frame to replace PPF frame; setting chip seat and gold thread bonding point on the lead frame surface; coating silver glue on chip back plate; adhering the chip on the back plate; bonding the chip and the gold thread bonding point by gold thread; injection molding one lead frame and packaging chip and gold thread in plastics; removing the metal sheet; laser printing; stamping blue film on the back; cutting into independent piece and removing the blue film; testing and packaging finished product. It has the advantages of low cost, high welding performance, long cutting blade useful life, and no metal burr.

Description

technical field [0001] The invention relates to a novel QFN chip packaging process, in particular to a high-performance novel QFN packaging process, which belongs to the technical field of integrated circuit or discrete component packaging. Background technique [0002] The traditional QFN packaging, its packaging type is mainly packaged in a cell array frame and then cut into independent units, and its substrate is a frame etched with a film on the back. There are mainly following deficiencies: [0003] 1. A special high-temperature resistant film needs to be pasted on the back of the frame. Due to high temperature heating during use, the back film will emit harmful chemicals, causing pollution to the frame and chip bonding area, affecting the quality of the bonding process and affecting product quality. [0004] 2. The cost of the back film is high, and the frame uses PPF technology, which leads to a higher price of the frame than the general frame, thereby increasing the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50
CPCH01L2224/32245H01L2224/48091H01L2224/48247H01L2224/48465H01L2224/73265H01L2224/97H01L2924/181
Inventor 谭小春李云芳
Owner DIODES SHANGHAI
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