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Apparatus and method for fabricating semiconductor devices

Inactive Publication Date: 2005-01-27
DONGBUANAM SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0017] Another additional object of the present invention is to provide a method for fabricating semiconductor devices, in which during a CMP process after formation of a protective step on an edge of a semiconductor wafer, over-polishing, which results in a height difference between the edge and a pattern of the wafer, is prevented.
[0018] In order to accomplish these objects, according to one embodiment of the present invention, there is provided an apparatus for fabricating semiconductor devices, comprising: a wafer chuck for holding a semiconductor wafer on which various thin layers has been deposited; a processing chamber for injecting etching gas toward the wafer to form a predetermined pattern; and a clamp, attached to an edge of the wafer being held by the wafer chuck, for preventing the edge from being etched.
[0019] According to another embodiment of the present invention, there is provided an apparatus for fabricating semiconductor devices, comprising: a wafer chuck for holding a semiconductor wafer on which various thin layers has been deposited; a processing chamber for injecting etching gas toward the wafer to form a predetermined pattern; and a shadow ring, provided in the chamber upwardly spaced apart from the wafer being held by the wafer chuck, for preventing the edge from being etched.

Problems solved by technology

However, there is a problem in that it is difficult to control the level of polishing resulting from a chip layout, a pattern density, a pattern height and so forth.
To avoid this problem, a dummy chip has been used, but it acts as a factor which decreases the yield of semiconductor devices.
However, the wafer may not only be contaminated by the non-rinsed photoresist during transporting of the wafer.

Method used

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  • Apparatus and method for fabricating semiconductor devices
  • Apparatus and method for fabricating semiconductor devices
  • Apparatus and method for fabricating semiconductor devices

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Embodiment Construction

[0026] Hereinafter, a preferred embodiment of the present invention will be described with reference to the accompanying drawings. In the following description and drawings, the same reference numerals are used to designate the same or similar components, and so repetition of the description on the same or similar components will be omitted.

[0027] Referring to FIG. 2, in an apparatus for fabricating semiconductor devices, a processing chamber 100 used in an ion etching process is housed with a wafer chuck 101 for holding a wafer 102, a gas injection head 103 for injecting gas toward the wafer 102, and a clamp 104 for grasping the wafer 102 and preventing an edge of the wafer from being etched.

[0028] The wafer 102 is subjected to deposition of various thin layers thereon, and then patterned in a predetermined pattern by a photolithography process and an etching process.

[0029] In the photolithography process, to restrict photoresist contamination and particle generation, the edge o...

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PUM

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Abstract

Disclosed is apparatus and method for fabricating semiconductor devices, in particular comprising a wafer chuck for holding a semiconductor wafer on which a predetermined thin layer is deposited; a processing chamber for injecting etching gas toward the wafer to form a predetermined pattern; and a clamp or a shadow ring provided on an edge of the wafer being held by the wafer chuck and preventing the edge from being etched, and thereby forming a protective step around the edge. Therefore, during a subsequent CMP process, the pattern adjacent to the edge of the wafer can be prevented from being over-polished, and reliability as well as productivity of the semiconductor devices can be improved.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the invention [0002] The present invention relates to an apparatus and method for fabricating semiconductor devices, and more particularly for forming a protective step which can prevent an edge of a semiconductor wafer from being over-polished during a chemical-mechanical polishing (CMP) process. [0003] 2. Description of the Prior Art [0004] In general, a CMP process has been applied as a planarization process for insulation layers as well as a damascene process for metallic layers. [0005] The CMP process is employed in polishing a semiconductor wafer surface by using the friction between slurry and a pad, in which various consumables, such as slurry, a pad, a backing film, a diamond conditioner, etc., are used. The polishing property of this process is dependant upon pressure distribution between the pad and the wafer while the wafer is polished in close contact with the pad. [0006] When the amount of polishing on one surface of a bla...

Claims

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Application Information

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IPC IPC(8): H01L21/3065H01L21/304H01L21/3105H01L21/3205H01L21/321H01L21/68
CPCH01L21/3212H01L21/31053H01L21/68
Inventor KIM, CHANG GYUKIM, WAN SHICK
Owner DONGBUANAM SEMICON
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