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III/V-semiconductor

a technology of semiconductors and semiconductors, applied in the direction of lasers, nanotechnology, crystal growth processes, etc., can solve the problems of signal distortion, on-chip driver size, and connection of fast chips

Inactive Publication Date: 2007-01-18
PHILIPPS UNIV MARBURG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

With this trend further advancing, problems are coming up for the connection of fast chips.
Critical aspects in conjunction with high-speed connections are reliability, cost, on-chip driver size and performance, crosstalk, signal distortions and lack of flexibility in the chip design.
Silicium is however an indirect semiconductor, and the production of efficient optoelectronic components using the Si technology is consequently hardly possible.
If now contacts between layers on the basis of the Si technology and layers on the basis of the technology of the III / V semiconductor are to be made, it is problematic that the lattice constants of the respective materials are different (this also applies to GaP substrates instead of Si substrates).
Such dislocations however disturb the function of the complete semiconductor structure to a substantial degree, the more since the functional layer thicknesses are today in the order of atomic dimensions.
If then the semiconductor structure cools down to ambient temperature, the differences of the lattice constants caused by the different thermal expansion coefficients will lead to the above stresses and dislocations.
This technology is however not suitable for high-integrated circuits because of the lacking controllability of microcracks in atomic scales.
This technology, too, is not suitable for applications in high-integrated circuits.
In fact, such layers are only suitable for InP substrates and form undesirably many dislocations and faults on Si or GaP substrates.

Method used

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Examples

Experimental program
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example 1

Production of a Semiconductor Layer According to the Invention

[0052] After the usual pretreatment, a Si wafer (manufacturer: Wacker, Virginia Semiconductor) is placed in a MOVPE apparatus (type AIX200-GFR, manufacturer Aixtron). First, epitaxial layers are deposited in a conventional way on the Si wafer, as described in more detail in the following Examples. On the thus obtained surface, then a layer of the III / V semiconductor according to the invention is deposited. For this purpose, an inert gas flow (H2) is loaded with the various educts. The following educts are used: trimethylgallium or triethylgallium, trialkylindium (as far as applicable), 1,1-dimethylhydrazine, tertiarybutylarsine, tertiarybutylphosphine and trimethylantimony (as far as applicable). All these educts are for instance available from Akzo Nobel HPMO.

[0053] For the production of a semiconductor layer according to the invention having an exemplary composition Ga(N0.037As0.883P0.08), the following conditions wer...

example 3

Monolithic Integrated Semiconductor Structure According to the Invention

[0056] A monolithic integrated semiconductor structure according to the invention is shown in FIG. 1. For the production, the layers B1) to F2) are subsequently epitaxially grown on a Si wafer A. The layer B1) is p-doped GaP. Zinc or magnesium is used as doping element. The doping concentration is typically 1·1018 cm−3. The layer thickness of the layer B1) is 5-300 nm. The layer B1) is a contact layer, which is also current conducting. Thereafter, the layer B2) is produced, which is formed of p-doped (AlGa)P. Doping is made with zinc or magnesium in a doping concentration of typically 1·1018 cm−3. The aluminum concentration is more than 15 mole-%, referred to the total amount of group III elements. A typical value is in the range of 15-45 mole-%. Alternatively, p-doped (AlGa)(NP) can also be used, and with regard to doping and aluminum content the above applies. The share of nitrogen referred to the total amoun...

example 4

Fundamental Energy Gap of a Semiconductor According to the Invention

[0059] A semiconductor layer produced according to Example 1 with 4 mole-% nitrogen, 90 mole-% arsenic and 6 mole-% phosphorus, referred to the total amount of group V elements, was investigated by means of the photoluminescence excitation spectroscopy. The result is shown in FIG. 2. The fundamental energy gap is approx. 1.4 eV. This value is clearly lower than the value of 1.8 eV modeled without the nitrogen interaction and shows the drastic influence of the energy gap by the incorporation of nitrogen in coordination with the further shares of other components in the semiconductor system according to the invention.

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Abstract

The invention relates to a monolithic integrated semiconductor structure comprising a carrier layer on the basis of doped Si or doped GaP and a III / V semiconductor disposed thereupon and having the composition GaxInyNaAsbPcSbd, wherein x=70-100 mole-%, y=0-30 mole-%, a=0.5-15 mole-%, b=67.5-99.5 mole-%, c=0-32.0 mole-% and d=0-15 mole-%, wherein the total of x and y is always 100 mole-%, wherein the total of a, b, c and d is always 100 mole-%, and wherein the ratio of the totals of x and y on the one hand and of a to d on the other hand is substantially 1:1, to methods for the production thereof, new semiconductors, the use thereof for the production of luminescence diodes and laser diodes or also modulator and detector structures, which are monolithically integrated in integrated circuits on the basis of the Si or GaP technology.

Description

FIELD OF THE INVENTION [0001] The invention relates to a new III / V semiconductor, a semiconductor layer consisting of such a semiconductor, a monolithically integrated semiconductor structure comprising such a semiconductor layer, the uses of such a semiconductor or of such a semiconductor layer, and a method for the production of such a semiconductor layer. BACKGROUND OF THE INVENTION AND PRIOR ART [0002] In the field of computer technology, there is a continuously growing demand for higher processing and signal conduction capacities in conjunction with a high reliability and flexibility. In the past, the chip technology has made a rapid progress with regard to integration density and working speeds or cycle frequencies. With this trend further advancing, problems are coming up for the connection of fast chips. Critical aspects in conjunction with high-speed connections are reliability, cost, on-chip driver size and performance, crosstalk, signal distortions and lack of flexibility...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L31/00
CPCB82Y20/00H01S5/3434C30B29/40H01L21/02381H01L21/02392H01L21/0245H01L21/02461H01L21/02502H01L21/02505H01L21/02538H01L21/0262H01L29/201H01L33/06H01L33/26H01L33/32H01S5/021H01S5/0218H01S5/183H01S5/323H01S5/34333C30B25/02
Inventor KUNERT, BERNARDETTEKOCH, JORGREINHARD, STEFANVOLZ, KERSTINSTOLZ, WOLFGANG
Owner PHILIPPS UNIV MARBURG