Noble metal / non-noble metal electrode for rram applications

Abstract

A method for forming a non-volatile memory device includes disposing a junction layer comprising a doped silicon-bearing material in electrical contact with a first conductive material, forming a switching layer comprising an undoped amorphous silicon-bearing material upon at least a portion of the junction layer, disposing a layer comprising a non-noble metal material upon at least a portion of the switching layer, disposing an active metal layer comprising a noble metal material upon at least a portion of the layer, and forming a second conductive material in electrical contact with the active metal layer.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]The present invention is a continuation of non-provisional U.S. patent application Ser. No. 13 / 585,759, filed Aug. 14, 2012 which is hereby incorporated by reference for all purposes.BACKGROUND[0002]The inventors of the present invention have recognized the success of semiconductor devices has been mainly driven by an intensive transistor down-scaling process. However, as field effect transistors (FETs) approach sizes less than 100 nm, physical problems such as short channel effect begin to hinder proper device operation. For transistor based memories, such as those commonly known as Flash memories, other performance degradations or problems may occur as device sizes shrink. With Flash memories, a high voltage is usually required for programming of such memories, however, as device sizes shrink, the high programming voltage can result in dielectric breakdown and other problems. Similar problems can occur with other types of non-volatile m...

AI Technical Summary

Benefits of technology

The present invention provides a method for improving the performance of a non-volatile memory device by increasing its reliability, consistency, and thickness uniformity, as well as ensuring better retention. This method uses existing semiconductor equipment and techniques without any modification. In simple terms, this invention will make non-volatile memory devices better and more reliable.

Problems solved by technology

However, as field effect transistors (FETs) approach sizes less than 100 nm, physical problems such as short channel effect begin to hinder proper device operation.

For transistor based memories, such as those commonly known as Flash memories, other performance degradations or problems may occur as device sizes shrink.

With Flash memories, a high voltage is usually required for programming of such memories, however, as device sizes shrink, the high programming voltage can result in dielectric breakdown and other problems.

Similar problems can occur with other types of non-volatile memory devices other than Flash memories.

A common drawback with these memory devices include that they often require new materials that are incompatible with typical CMOS manufacturing.

As another example of this, Fe-RAM and MRAM devices typically require materials using a high temperature anneal step, and thus such devices cannot be normally be incorporated with large volume silicon-based fabrication techniques.

Additional drawbacks with these devices include that such memory cells often lack one or more key attributes required of non-volatile memories.

As an example of this, Fe-RAM and MRAM devices typically have fast switching (e.g. “0” to “1”) characteristics and good programming endurance, however, such memory cells are difficult to scale to small sizes.

In another example of this, for ORAM devices reliability of such memories is often poor.

As yet another example of this, switching of PCRAM devices typically includes Joules heating and undesirably require high power consumption.

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