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Adaptive bulk-bias technique to improve supply noise rejection, load regulation and transient performance of voltage regulators

a voltage regulator and bulk bias technology, applied in the field of linear voltage regulators, can solve the problems of reducing the size of cmos devices, reducing the efficiency of power management circuits, and affecting the battery life time directly, so as to improve the load transient response of ldo, increase output impedance, and increase output current capability

Inactive Publication Date: 2019-02-07
VIDATRONIC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent describes a method for improving the performance of a low-dropout regulator (LDO) by using an adaptive bulk-bias technique. This technique can increase the output current capability, improve load transient response, and increase output impedance when the load is high. By combining both a fast and slow bias signal paths, the method compensates for output spikes caused by the fast load transition. Overall, the adaptive bulk-bias technique can make the LDO regulator more robust and efficient.

Problems solved by technology

The conversion efficiency of a power management circuit directly affects the battery life time.
However, the smaller dropout requires an area increase of the power device (pass device) of the LDO.
This results in an efficiency-area tradeoff.
Moreover, as the technology advances, the sizes of CMOS devices become smaller and the maximum allowed voltages for the circuits built by these devices are also becoming much lower.
Thus, the expected voltage variation at the gate of the pass device is limited.
This results in a limited current capability for a given device size, if controlled only by its gate voltage.
These new application requirements on LDO regulators present great challenges for circuit designers.
Although, achieving a silicon area improvement for the same current capability, the above improvements did not address the following:1. The bulk-bias voltage improves the current capability for a given device size.
On the other hand, at low output currents, the bulk bias degrades the Power Supply Rejection (PSR) of the LDO.2. The load regulation performance of the LDO regulators using a constant bulk-bias voltage becomes worse than that of a conventional LDO regulator without bulk-bias technique.3. At small load currents, a small gate to source voltage (VGS) of the pass transistor is required to maintain the output current.
This leads to more stress on the output range of the error amplifier design.

Method used

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  • Adaptive bulk-bias technique to improve supply noise rejection, load regulation and transient performance of voltage regulators
  • Adaptive bulk-bias technique to improve supply noise rejection, load regulation and transient performance of voltage regulators
  • Adaptive bulk-bias technique to improve supply noise rejection, load regulation and transient performance of voltage regulators

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Embodiment Construction

[0030]Embodiments of the present invention are illustrated with the above-identified drawings and the following description. In the description, like or identical reference numerals are used to identify common or similar elements. The drawings are not necessarily to scale and certain features may be shown exaggerated in scale or in schematic in the interest of clarity and conciseness.

[0031]Embodiments of the invention relate to an inventive method to improve the power supply rejection (PSR), load regulation, and load transient performance of voltage regulators by adding a load-adaptive bulk-bias to the pass devices of voltage regulators.

[0032]Because a strong forward bulk-bias voltage can lead to a high leakage current through the p-n junction diode in the pass devices (p-channel or n-channel MOSFETs), the value of this bulk-bias voltage is limited to a certain value in order to prevent this high leakage current. Simulation and experiments can be performed to obtain this maximum bul...

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Abstract

A low-dropout (LDO) voltage regulator includes an adaptive bias source for generating a bulk-bias signal to a pass device in the LDO voltage regulator, wherein the adaptive bias source generates the bulk-bias signal based on a signal obtained at an output of the LDO voltage regulator. The signal includes a current signal, which is proportional to a current at the output of the LDO voltage regulator, and / or a feedback signal from a feedback path connected between the adaptive bias source and the output of the LDO voltage regulator for sensing negative and / or positive spikes.

Description

FIELD OF INVENTION[0001]The present invention relates to linear voltage regulators, particularly to bulk-biased linear voltage regulators.BACKGROUND[0002]The demands for portable electronics, such as smart phones, bluetooth headphones and so on, are growing fast. Since most of these devices integrate many power supply-sensitive circuits onto a single integrated chip, a constant, clean and accurate supply is very necessary. Linear voltage regulators (e.g. Low Drop-Out (LDO) regulators) can provide a well-specified and stable dc-voltage. They are also widely-used in the integrated System-on-Chip (SoC) designs, which require power management circuits to optimize the power consumption of different analog, digital or Radio Frequency (RF) blocks independently. Throughout this disclosure, the terms “LDO linear voltage regulator” and “LDO” may be used interchangeably depending on the context.[0003]The area, voltage conversion efficiency, and load transient response performance are critical ...

Claims

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Application Information

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IPC IPC(8): G05F1/575G05F1/565G05F1/46G05F1/445
CPCG05F1/575G05F1/445G05F1/467G05F1/565
Inventor HU, HEHUSSIEN, FAISAL ABDELATIF ELSEDEEK
Owner VIDATRONIC
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