Method and system for reducing memory faults while running an operating system

Abstract

Method and system for reducing memory faults for computer systems. In one aspect, a notification is received that indicates that a single bit error has been detected in a portion of memory of the computer system. A service program is used to isolate the portion of the memory that includes the detected single bit error by allocating the portion of memory to itself, such that the portion of memory may no longer be accessed for data reading or writing by programs running on the computer system.

Description

FIELD OF THE INVENTION[0001]The present invention relates to memory fault reduction in computer systems, and more particularly to the reduction of memory faults while running an operating system.BACKGROUND OF THE INVENTION[0002]As the use of servers for database and computer applications increases, the need also increases for robust systems that can detect failures in the system that have occurred and reduce or prevent errors and failures from occurring. One type of failure that can occur is memory errors that occur in physical memory, such as random access memory (RAM) or other types of memory. Bits of data stored in physical memory cells may be corrupted upon writing, reading, or during storage. For example, unexpected or unwanted changes in the value of a stored bit may occur somewhere in the memory when a bit suddenly and randomly changes state, resulting in errors in the data. Or, a noise pulse (electronic interference), crosstalk, or glitch in the circuits or busses of a devic...

AI Technical Summary

Benefits of technology

The present invention is a system and method for reducing memory faults in a computer system. It detects single bit errors in memory and isolates the affected portion of memory from other programs running on the system. This prevents the error from affecting the performance of the system and allows critical applications to maintain performance without interruption due to memory faults. The invention is running while the system is continuously running, and it allows for reallocation of the contents of the affected memory portion to a different portion of memory or to a different storage area. Overall, the invention reduces memory faults and improves the reliability and performance of computer systems.

Problems solved by technology

One type of failure that can occur is memory errors that occur in physical memory, such as random access memory (RAM) or other types of memory.

Bits of data stored in physical memory cells may be corrupted upon writing, reading, or during storage.

For example, unexpected or unwanted changes in the value of a stored bit may occur somewhere in the memory when a bit suddenly and randomly changes state, resulting in errors in the data.

Other errors can occur in the memory chips as a result of electromagnetic radiation, or radioactive decay in the atoms of the epoxy of the plastic chip package of the chip which causes a memory cell to change state.

Sometimes, a part of a memory chip can physically fail, causing recurring errors, and rebooting the system does not alleviate the condition, thus requiring the memory chip to be replaced.

“Soft” errors are those errors that generally result from transient events such as noise, crosstalk, or radiation, and may not indicate any serious or recurring problem with the memory at particular storage locations, while “hard” errors are those which result from a failure in the hardware which may permanently cause recurring errors.

In recent years, as system memory is much increased in density (i.e. more memory is stored on fewer physical devices), the possibility for memory errors poses a far greater threat to system availability.

Many systems have focused on the detection and correction of single bit errors; however, multi-bit errors can and do occur.

With shrinking geometries of memory circuits resulting from advancement in semiconductor process technology, the importance of multi-bit errors may be increasing relative to single bit errors.

Once a single bit error occurs in a portion of memory, the probability that a double bit error will occur in that same portion of memory increases; this is because, if a single bit error occurs, it may indicate that that portion of memory is prone to noise errors or glitches, or will soon have a hardware failure.

However, these commonly-used schemes are typically not be able to correct any double bit errors that are detected.

Thus, if a single bit error is detected, that error is corrected and the memory is monitored for further errors, but if a double bit error is detected, then the system logs the error and immediately stops the system from processing to avoid data corruption.

The disadvantage of halting the system and its programs and rebooting the system after a double bit error occurs is that some applications running on the system are deemed “mission critical” and cannot adequately perform their intended function if interrupted.

For example, heart monitoring equipment that is controlled by software should not be stopped due to memory errors and only resumed after rebooting the system, as rebooting heart monitoring software would leave a patient at risk while the reboot took place.

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