Novel integrated circuit or discrete components ultra-thin non-pin packing technology and packing arrangement
A technology for integrated circuits and discrete components, applied in the field of ultra-thin leadless packaging of new integrated circuits or discrete components, can solve the problems of high electroplating cost, influence on solderability, and low utilizability, and achieve absolute coplanarity, Maintain weldability and produce simple and smooth results
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[0041] The novel integrated circuit or discrete element ultra-thin and non-legged packaging process of the present invention consists of the following processes in turn:
[0042] 1) Substrate—see Figure 1, take a piece of metal substrate 1 with an appropriate thickness. The material of the metal substrate 1 can be changed according to the functions and characteristics of the chip, for example: nickel-iron alloy, copper alloy and so on.
[0043] 2) Substrate half-etching—see FIG. 2, half-etching is performed on the front of the metal substrate 1, the unetched area on the metal substrate 1 forms the base island 1.1 and the pin 1.2, and the half-etched area forms the half-etched area 1.3, which The main purpose is to avoid glue overflow and the reliability of the wire bonding process in the subsequent encapsulation operation.
[0044] 3) Metallized layer——see FIG. 3, a metal layer 2, such as gold, silver, copper, and nickel, is plated on the front of the base island 1.1 and pin ...
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