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Novel integrated circuit or discrete components ultra-thin non-pin packing technology and packing arrangement

A technology for integrated circuits and discrete components, applied in the field of ultra-thin leadless packaging of new integrated circuits or discrete components, can solve the problems of high electroplating cost, influence on solderability, and low utilizability, and achieve absolute coplanarity, Maintain weldability and produce simple and smooth results

Active Publication Date: 2008-02-20
长电科技管理有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this way, in addition to the high cost of electroplating, the wire bonding parameters also need to set special parameters for this material, which directly affects the smoothness of the production line due to the inconsistency of the parameters.
[0005] 3. Pollution Because the lead frame uses special chemical tape, the solvent of the tape is easily vaporized due to high temperature in various high-temperature processes, which indirectly pollutes or covers the chip's pressure zone and the inner pin of the wire, often resulting in poor wire bonding ability. Stablize
[0006] 4. The flexibility of chips and external pins Limited by the traditional lead frame, multi-chips and external pins with different outputs can only be arranged in a rigid manner, and the flexibility is low
[0007] 5. The solderability of the external pins is limited by the traditional lead frame, and the output external pins are as flat as the bottom of the colloid (plastic encapsulation), and there is even a risk of dents; while in surface mounting, flux and other chemicals Chemicals, etc. cannot be discharged smoothly, so the solderability will be greatly affected
[0008] 6. The back of the traditional lead frame of metal wire ball welding needs to be pasted with expensive high-temperature and high-pressure chemical tape. During the wire bonding process, the force is easily absorbed by the softness of the tape. Reliability during production and product wiring

Method used

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  • Novel integrated circuit or discrete components ultra-thin non-pin packing technology and packing arrangement
  • Novel integrated circuit or discrete components ultra-thin non-pin packing technology and packing arrangement
  • Novel integrated circuit or discrete components ultra-thin non-pin packing technology and packing arrangement

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Embodiment Construction

[0041] The novel integrated circuit or discrete element ultra-thin and non-legged packaging process of the present invention consists of the following processes in turn:

[0042] 1) Substrate—see Figure 1, take a piece of metal substrate 1 with an appropriate thickness. The material of the metal substrate 1 can be changed according to the functions and characteristics of the chip, for example: nickel-iron alloy, copper alloy and so on.

[0043] 2) Substrate half-etching—see FIG. 2, half-etching is performed on the front of the metal substrate 1, the unetched area on the metal substrate 1 forms the base island 1.1 and the pin 1.2, and the half-etched area forms the half-etched area 1.3, which The main purpose is to avoid glue overflow and the reliability of the wire bonding process in the subsequent encapsulation operation.

[0044] 3) Metallized layer——see FIG. 3, a metal layer 2, such as gold, silver, copper, and nickel, is plated on the front of the base island 1.1 and pin ...

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Abstract

This invention relates to integration circuit or separate super thin sealing process, which comprises the following steps: taking one slice of metal base materials for semi-etching; coating metal on the lead leg positive side or base island etched; planting chips and making wires; covering plastic sealed part and printing on front page; coating ink on the back of the metal base board; cutting semi-etching back part; etching on the rest metal base board to make the lead leg and base island exposed to the plastic surface; removing dried ink and coating metal layer on the lead leg; sticking glue film on the front side of plastic part. The sealed structure comprises chip supportive base socket, wire inner leg supportive socket, chip, metal line and plastic sealed part.

Description

Technical field: [0001] The invention relates to a novel ultra-thin and footless packaging process for integrated circuits or discrete components. It belongs to the technical field of packaging of integrated circuits or discrete components. Background technique: [0002] The traditional ultra-thin and footless packaging process of integrated circuits or discrete components and its packaging structure, its packaging type is an array-type assembly that is cut into a single unit. Its substrate type is lead frame type. It mainly has the following deficiencies: [0003] 1. Special tape Use special tape to prevent the plastic compound from penetrating into the lead frame when the plastic is encapsulated under high pressure, thereby increasing the risk of insulation of the external pins; but if the plastic compound still penetrates, it is easy to dislodge the external leads during post-processing. The palladium plating layer of the feet is damaged, which affects the solderabilit...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L23/12H01L23/48H01L23/28
CPCH01L2224/92247H01L24/97H01L2224/48091H01L2224/48465H01L2224/73265H01L2224/32245H01L2224/48247H01L2224/45147H01L24/73H01L2224/45H01L2224/45124H01L2224/45139H01L2224/45144H01L2224/97H01L2924/01047H01L2924/01322H01L2924/14H01L2924/181H01L2924/00014H01L2924/00012H01L2924/00
Inventor 梁志忠谢洁人陶玉娟葛海波王达周正伟
Owner 长电科技管理有限公司