Method for making vertical double diffusion FET compatible conventional FET

Abstract

The invention is a vertical bilateral diffusion field-effect transistor (FET) compatible routine FET making method, a BCD process method for making high voltage integrated circuits, adopting silicon slice to make VDMOS, making high concentration P+1 injection in the periphery of a chip and extending junction depth; making PWELL1 injection in low voltage region, making NWELL injection in low voltage region, preoxidizing grid of the whole chip, injecting P impurity into the whole slice and oxidizing, etching thick oxide layer, then oxidizing the whole slice, depositing, doping and etching on the whole polycrystalline silicon slice, after etching, retaining voltage dividing field plate, making PWELL2 B injection in VDMOS region, and extending junction depth; making N+ As injection in a region used to make VDMOS source, and NMOS source / drain and PMOS substrate bias of CMOS, substrate bias of PMOS, and making B injction 'P+2' in the positions of PMOS source / drain and NMOS substrate bias of CMOS, making contact hole etching, evaporating aluminum on the whole chip, corroding aluminum to form meal leads, and etching pressure point.

Description

Technical field [0001] The invention is a BCD (Bipolar / CMOS / DMOS) process method for manufacturing HVIC (High Voltage Integrated Circuit), which belongs to the technical field of semiconductor manufacturing. Background technique [0002] With the continuous development of semiconductor technology, HVIC has become more and more widely used. The continuous development of semiconductor process technology. BIPOLAR (Bipolar), CMOS (Complementary Metal Oxide Semiconductor Field Effect Transistor) and DMOS (Double Diffused Metal Oxide Semiconductor Field Effect Transistor) originally three independent branches continue to merge with each other, and gradually developed the integration of BIPOLAR and CMOS. The BICMOS and the BCD process integrated by the three. Using Bipolar / CMOS / DMOS integrated BCD process, it combines the usual three different process types: bipolar is for analog control; CMOS is for digital control; DMOS is for processing high voltage and large current in the managemen...

AI Technical Summary

Problems solved by technology

In this way, the technical difficulty is reduced, but the cost of packaging is greatly increased

At the same time, the use of dual chips increases the power consumption; due to the different islands, the control chip's ability to monitor the overheating of the output chip is reduced, and the reliability is greatly reduced; the impact of packaging on the reliability of the circuit is significantly increased

Images