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Silicon base covariant underlay with the ultrathin carbon silicon middle layer and its preparing method

An interlayer, silicon carbide technology, applied in sustainable manufacturing/processing, climate sustainability, final product manufacturing, etc., can solve problems such as difficulty in realizing 3C-SiC thin films, inability to obtain, etc., and achieve a good mismatch strain coordination effect , to avoid the problem of impurity pollution, the effect of improving the growth quality

Inactive Publication Date: 2007-08-15
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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  • Summary
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  • Application Information

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Problems solved by technology

However, the existing conventional SiC thin film preparation and growth processes, such as chemical vapor deposition (CVD), magnetron sputtering, and plasma-assisted deposition, are difficult to achieve low temperature (below 1000°C) for 3C-SiC thin films on Si substrates. ) ultra-thin (several to tens of nanometers) high-purity and high-quality growth, so it is impossible to obtain Si-based ultra-thin 3C-SiC interlayer covariable substrates with high crystal quality and smooth and flat surface

Method used

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  • Silicon base covariant underlay with the ultrathin carbon silicon middle layer and its preparing method
  • Silicon base covariant underlay with the ultrathin carbon silicon middle layer and its preparing method
  • Silicon base covariant underlay with the ultrathin carbon silicon middle layer and its preparing method

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preparation example Construction

[0048] Please refer to Fig. 1 again, a method for preparing a silicon-based variable substrate with an ultra-thin silicon carbide intermediate layer according to the present invention is characterized in that the preparation method includes the following steps:

[0049] Take a silicon substrate 21;

[0050] Preparing an ultra-thin 3C-SiC intermediate layer 22 on a silicon substrate 21 by ion beam epitaxy;

[0051] An epitaxial layer 23 is prepared on the ultra-thin 3C-SiC intermediate layer 22 by magnetron sputtering.

[0052] The preparation steps of the ultra-thin 3C-SiC intermediate layer 22 are as follows:

[0053] Step 1: Select argon gas with low purity requirements as the I-beam ion source of the low-energy dual ion beam epitaxy equipment to generate argon ion beam raw materials for dry sputtering cleaning of the substrate surface;

[0054] Step 2: Select carbon monoxide gas with low purity requirements as the low-energy dual ion beam epitaxy equipment II beam ion sou...

Embodiment

[0072] The structure of the silicon-based covariable substrate with an ultra-thin silicon carbide interlayer is shown in Figure 1, and its main technical parameters are shown in Table 1.

[0073] Table 1: Main technical parameters of silicon-based variable substrate with ultra-thin silicon carbide interlayer

[0074]

Supporting substrate 21

Material

Silicon (Si)

Thickness (μm)

300-500

crystal quality

single crystal

Covariant middle layer 22

Material

Cubic silicon carbide (3C-SiC)

Thickness (nm)

5-30

crystal quality

single crystal or polycrystalline

Mismatched Epitaxial Layer 23

Lattice mismatch with substrate 1

Not less than 10%

[0075] crystal with covariable interlayer 2

lattice mismatch

Not more than 10%

crystal quality

single crystal or polycrystalline

[0076] Referring to the schematic diagram of the S...

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Abstract

The silicon-base coviant substrate with ultrathin SiC intermediate layer comprises: from bottom to top, a silicon substrate for support, a ultrathin 3C-SiC intermediate layer for mismatch strain coordination, and an extension layer with much lattice mismatch with the substrate.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a silicon-based variable substrate with an ultra-thin silicon carbide intermediate layer prepared by ion beam epitaxy equipment. Background technique [0002] In addition to the advantages of good quality, low price, large size, mature device technology and integration, silicon (Si) also has good thermal and electrical conductivity, so it is often used as a large mismatch heterostructure material zinc oxide (ZnO ), gallium nitride (GaN) and aluminum nitride (AlN) and other epitaxial growth substrates. However, due to the large lattice mismatch and thermal expansion coefficient difference, as well as the influence of interfacial chemical problems, it is difficult to achieve satisfactory results by direct growth. The use of substrate preparation technology is the main means to solve the problem of large mismatch epitaxy, that is, by changing the crystal structure, physical ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/00H01L31/0248H01L31/18H01L29/02H01L21/20
CPCY02P70/50
Inventor 杨少延杨霏李成明范海波陈涌海刘志凯王占国
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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