Low-cost high-efficient time division multiplex charge pump circuit

Abstract

The invention relates to a time-sharing multiplex charge pump circuit with low cost and high efficiency, belonging to the fields of the analog integrated circuit design and LCD drive circuit design, and particularly relates to the LCD drive circuit design based on an HiFas (High Frequency Amplitude Selection) scanning way. The circuit is characterized in that the system adopts a time-sharing multiplex technology for reducing the design requirements of a technological pressure-resisting value; a space overlapping technology is adopted in the design of a coupling capacitor, therefore, the area of a chip is more rationally utilized. In the design of a polarity conversion circuit, an external capacitor can be saved by flexibly switching the voltage on a capacitor polar plate. In the design of a positive high-pressure charge pump and a negative high-pressure charge pump, a zero bulk-biased technology and a charge sharing technology are used, thus enhancing the charge transferring efficiency and reducing the internal friction of the circuit. By utilizing the technologies, the circuit can substantially reduce design cost and enhance circuit efficiency.

Description

technical field [0001] A low-cost, high-efficiency, time-division multiplexing charge pump circuit belongs to the fields of analog integrated circuit design and LCD drive circuit design, and particularly relates to the design of an LCD drive circuit based on HiFas scanning mode. Background technique [0002] In many integrated circuit systems, it is necessary to generate a positive high voltage or a negative high voltage higher than the power supply voltage VCI on-chip. figure 1 It is the driving waveform of the LCD driving circuit based on the HiFas scanning method. The column voltages VG and GND, the positive high voltage V0 and the negative high voltage XV0 are all symmetrical about the row voltage VM. In addition, the system needs to generate a positive high voltage V0 as the row selection when it is positive. Signal; in negative polarity, a negative high voltage XV0 needs to be generated as a row selection signal. [0003] Traditionally, two separate charge-pump circui...

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Problems solved by technology

But this will undoubtedly occupy a large chip area, so there is a literature that proposes a charge pump circuit based on coupling capacitor sharing and is applied to the field of flash memory circuit design; figure 2 It is the circuit diagram of this charge pump. CK1 and CK2 are two-phase non-overlapping clocks. The positive charge pump and the negative charge pump share a set of capacitors through a set of coupling switches controlled by VCP and VCN; where the PMOS and NMOS in the coupling switch The substrate terminals of the system are respectively connected to the most positive voltage VPP and the most negative voltage VPN of the system, which seriously restricts the efficiency of the circuit and increases the internal friction of the circuit; in addition, the circuit uses a PMOS transmission tube to transmit low-level , Using NMOS transmission tube to transmit high level, there is a loss of threshold voltage, so only positive high voltage of (N+1)*(VCI-Vt) and negative high voltage of -N*(Vt-VCI) can be generated, of which N is the number of stages of the charge pump, Vt is the threshold of the transmission tube

In this way, for a given voltage, more stages, that is, more area, will be required to realize the circuit design; and this problem will become more and more serious with the continuous reduction of process feature size and the continuous reduction of system power supply voltage.

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