High performance DMA on embedded type processor chip

Abstract

The invention relates to a high performance DMA on an embedded type processor chip. The high performance DMA comprises a data buffer used for caching the data read from an on-chip memory, the data sent to a bus interface unit, the data received from the bus interface unit, and the data written into the on-chip memory; a data big-endian and little-endian convertor; a DMA controller used for initializing a state register, a control register, an initial address register and a data size register; a DMA transmission address generating logic module used for automatically calculating the transmission address of the next data on an on-chip external memory and generating chip selection and read and write signals of the on-chip memory according to the on-chip address, and simultaneously updating a data size counter till the counter changes to zero; and a bus transmission transmitter and receiver. The high performance DMA has the advantages that the development difficulty is low, the cost of the hardware is low, the transplantation is convenient, the expansibility is flexible, the data transmission speed is high, and the performance of the processor is greatly enhanced.

Description

technical field [0001] The invention relates to an on-chip DMA of an embedded processor. Background technique [0002] As integrated circuit design enters the era of system-on-chip, the functions of embedded systems are continuously enhanced, and applications are becoming more and more extensive. Embedded systems are also increasingly appearing in daily life, involving digital cameras, communication equipment, media players With the rapid development of hardware technology, the complexity of real-time embedded systems is also increasing, and the application fields are also expanding, which requires the design methods of embedded systems to be more mature and real-time Stronger and more reliable, with greater predictability. [0003] Modern high-performance hardware uses cache technology to bridge the performance gap between CPU and memory, but cache seriously affects real-time performance. The execution time gap between instructions or data in the cache and not in the cache...

AI Technical Summary

Problems solved by technology

[0005] In order to overcome the shortcomings of the existing embedded processor's on-chip DMA, which are difficult to develop, high in complexity, high in hardware overhead, relatively low in data transmission rate, and not strong in scalability, the present invention provides a DMA with low development difficulty. On-chip high-performance DMA with low complexity, user configurability and flexible scalability, easy system transplantation, increased data transfer rate and enhanced performance of embedded processors

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