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Semiconductor device with contact etching stop layer and forming method thereof

A contact etch stop, semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as easily damaged gate oxide layers, avoid device performance drift, and avoid device reliability. The effect of sexual deterioration

Inactive Publication Date: 2010-06-16
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] The invention provides a semiconductor device with a contact etching stop layer and a forming method thereof, so as to improve the phenomenon that the gate oxide layer is easily damaged in the formation process of the existing semiconductor device

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  • Semiconductor device with contact etching stop layer and forming method thereof
  • Semiconductor device with contact etching stop layer and forming method thereof
  • Semiconductor device with contact etching stop layer and forming method thereof

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Embodiment Construction

[0030] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0031] The processing method of the present invention can be widely used in various fields, and can utilize many suitable materials to make, and the following is to illustrate by specific embodiment, certainly the present invention is not limited to this specific embodiment, in this field Common replacements known to those of ordinary skill undoubtedly fall within the protection scope of the present invention.

[0032] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, which should not be u...

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Abstract

The invention discloses a method for forming a semiconductor device with a contact etching stop layer, which comprises the following steps of: providing a substrate on which at least one grid structure is formed; putting the substrate in a settling chamber to carry out the settlement of the contact etching stop layer; oxidizing the contact etching stop layer in situ to form an oxide film on the surface of the contact etching stop layer; taking out the substrate on which the oxide film is formed; and forming an interlayer dielectric layer on the oxide film by high-density plasma chemical vapour deposition equipment. The invention also discloses the semiconductor device with the contact etching stop layer. The semiconductor device with the contact etching stop layer and the forming method thereof of the invention can effectively prevent damages which are caused by using the high-density and large-power plasma in the step of settling the interlayer dielectric layer to a gate oxide layer and voids phenomena of device performance drift, device reliability reduction and the like.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device with a contact etching stop layer and a forming method thereof. Background technique [0002] The manufacture of semiconductor integrated circuits is an extremely complex process, the purpose of which is to reduce the various electronic components and circuits required for a specific circuit on a small-area wafer. Wherein, each component must be electrically connected by an appropriate interconnection wire, so as to exert the desired function. [0003] As the manufacture of integrated circuits develops towards Ultra Large Scale Integration (ULSI, Ultra Large Scale Integration), the internal circuit density is increasing. As the number of components contained in the chip continues to increase, the availability of surface wiring is actually reduced. space. The solution to this problem is to use a multilayer metal wire design. Wherein, t...

Claims

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Application Information

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IPC IPC(8): H01L21/82H01L21/768H01L21/31H01L21/316H01L27/02H01L23/532
Inventor 徐强吴永玉李敏
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP