Method for manufacturing self-aligned high voltage complementary metal oxide semiconductor (CMOS) in bipolar-CMOS-double-diffused metal oxide semiconductor (DMOS) (BCD) process

Abstract

The invention discloses a method for manufacturing a self-aligned high voltage complementary metal oxide semiconductor (CMOS) in a bipolar-CMOS-double-diffused metal oxide semiconductor (DMOS) (BCD) process, which comprises the following steps of: 1, forming a burial layer on a silicon substrate; 2, growing an epitaxial layer on the burial layer; 3, forming deep groove isolation on the epitaxial layer; 4, forming a low voltage P-type well; 5, growing a gate oxide layer and further depositing a polycrystalline silicon layer; 6, defining a position required to be injected with BODY through a photomask of the BODY by using photoresist to form a BODY area, performing etching to remove polycrystalline silicon from the defined area by using a dry etching method, and performing BODY area injection by using self-aligning large-angle injection; 7, defining a gate area to form a polycrystalline silicon gate; 8, performing N+ injection in the BODY area to form an N+ well, and forming a sidewall oxide film on the sidewall of the polycrystalline silicon gate; and 9, performing subsequent processes. The invention can meet requirements of high CMOS devices with instantaneous high voltage resistance, and improve the competitive power of the BCD process.

Description

technical field [0001] The invention belongs to the field of semiconductor integrated circuit manufacturing, and in particular relates to a self-aligned high-voltage CMOS manufacturing process method in a BCD process. Background technique [0002] The BCD process manufactures bipolar devices, CMOS (complementary metal oxide semiconductor) devices, and DMOS (double diffused metal oxide semiconductor) devices on the same chip at the same time. It combines the advantages of high transconductance and strong load driving capability of bipolar devices with high integration and low power consumption of CMOS, so that they learn from each other and give full play to their respective advantages. [0003] Now, a notable feature of BCD process development is the use of modular development methods, which can develop a variety of different types of IC (integrated circuits), and achieve the best compromise in performance, function and cost, so as to facilitate product development. Diversi...

AI Technical Summary

Problems solved by technology

However, the traditional CMOS channel area still adopts photolithography registration and channel area well advancement method, so the channel length and width obtained in this way are greatly affected by the process, resulting in large fluctuations

The registration accuracy of lithography, the temperature and time stability of the high-temperature furnace tube greatly affect the performance stability of CMOS devices; at the same time, customers have a great demand for high-voltage CMOS and require high-voltage CMOS devices that can withstand instants, while BCD The CMOS withstand voltage provided in the process is low, which is far from meeting the needs of customers

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