Bootstrapping sampling switch applied to high-speed and high-linearity analog-to-digital converter

Abstract

The invention provides a bootstrapping sampling switch applied to a high-speed and high-linearity analog-to-digital converter. The bootstrapping sampling switch comprises a clock booster, a grid-source voltage follower, a conduction switch and a charging and discharging enhanced circuit, wherein several times of power voltage are generated by the clock booster and used for charging a capacitor; the grid-source voltage follower connects the capacitor between the grid and the source when the conduction switch is off, so that a relevantly constant grid-source voltage difference under different voltage input is ensured; the charging and discharging enhanced circuit is added in a charging or discharging loop during switching of the switch so as to shorten the off and on time, reduce a parasitic capacitance of the grid of the conduction switch and reduce the loss of the storage charge of the capacitor; the use of a high-voltage metal oxide semiconductor (MOS) tube is not needed; meanwhile, high-linearity sampling is realized (the sampling rate is more than 1 KMHz under 65-nano complementary metal-oxide-semiconductor (CMOS) technology and a stray-free dynamic range more than 95 decibels can be obtained). A complicated logic control circuit is absent in the structure, so the area of a chip cannot be increased; moreover, a requirement of the clock buffer is not needed to be enhanced.

Description

technical field [0001] The invention relates to an important module applied to a sample-and-hold circuit, in particular to an analog switch suitable for a high-speed, high-linearity analog-to-digital converter using bootstrapped and multiple charging and discharging path technologies. technical background [0002] In modern mixed-signal integrated circuits, the analog-to-digital converter is an indispensable part, and its conversion accuracy and speed play a decisive role in the performance of the whole system. The analog switches used in the sample-and-hold circuit determine the dynamic range and sampling rate of the ADC. [0003] figure 1 A simple sample-and-hold circuit composed of CMOS switches and capacitors is given. Traditional CMOS switches are difficult to be used in high-linearity analog-to-digital converters due to their large on-resistance and variations with the input signal (such as figure 2 shown as the green curve). Increasing the size of the MOS tube ca...

AI Technical Summary

Problems solved by technology

This kind of bootstrap switch has the disadvantage of long turn-off time and turn-on time, and the high-voltage NMOS tube (such as image 3 M11 and M12 in ) further limit the switching speed of the switch

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