Three-step variable-temperature diffusion process for silicon cell

A crystalline silicon cell, diffusion process technology, applied in diffusion/doping, circuit, crystal growth and other directions, can solve problems affecting cell efficiency, low cell open-circuit voltage and short-circuit current, poor ohmic contact, etc., to enhance blue light response, The effect of increasing knot depth

Active Publication Date: 2012-03-21
REALFORCE POWER
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the shallow junction high square resistance process has three fatal defects: one is high square resistance, and the ohmic contact between the positive silver grid line and the silicon substrate is poor, resulting in excessive series resistance, which seriously reduces the fill factor and conversion efficiency; the other is high square resistance. The square resistance uniformity of the resistance process is not easy to control, and the unevenness between the chips in the chip is very large, which seriously affects the stability of the PN junction; the third is that the junction is shallow, and the silver particles are easy to enter the junction area during sintering, causing ...

Method used

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  • Three-step variable-temperature diffusion process for silicon cell
  • Three-step variable-temperature diffusion process for silicon cell
  • Three-step variable-temperature diffusion process for silicon cell

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Experimental program
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Embodiment 1

[0023] Insert the textured polysilicon wafer into the quartz boat and put it on the boat. After entering the boat, raise the furnace temperature to 800°C. After the temperature stabilizes, 5 slm of large nitrogen, 0.8 slm of small nitrogen, and 0.3 slm of oxygen are introduced for low-temperature pre-deposition. The deposition time is 20 minutes. Then the temperature of the furnace was raised to 830°C, and 6slm of large nitrogen was introduced to carry out high-temperature push-in junction, and the push-in time was 10 minutes. Then the temperature of the furnace was raised to 850° C., and 5.5 slm of large nitrogen, 1.0 slm of small nitrogen, and 0.3 slm of oxygen were introduced for redeposition and diffusion. Finally, the temperature was lowered to 830°C, and 6 slm of large nitrogen was introduced to purge, and the boat was unloaded.

Embodiment 2

[0025] Insert the textured monocrystalline silicon wafer into the quartz boat and put it on the boat. After entering the boat, raise the furnace temperature to 780°C. After the temperature stabilizes, 5 slm of large nitrogen, 1.0 slm of small nitrogen, and 0.3 slm of oxygen are introduced for low-temperature pre-deposition. The deposition time is 15 minutes. Then the temperature of the furnace was raised to 820°C, and 6slm of large nitrogen was introduced to carry out high-temperature push-in junction, and the push-in time was 15 minutes. Then the furnace temperature was raised to 860°C, and 5.5 slm of large nitrogen, 0.5 slm of small nitrogen, and 0.2 slm of oxygen were introduced for redeposition and diffusion. Finally, the temperature was lowered to 830°C, and 6 slm of large nitrogen was introduced to purge, and the boat was unloaded.

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Abstract

The invention relates to a three-step variable-temperature diffusion process for a silicon cell, which is realized by the following procedures: placing a silicon chip after etching into a boat, then rising the temperature to be 700-810 DEG C, and introducing large nitrogen, small nitrogen and oxygen to conduct low-temperature pre-deposition diffusion; subsequently rising the temperature to be 810-830 DEG C, and introducing large nitrogen to conduct knot thrusting; and then introducing large nitrogen, small nitrogen and oxygen, and rising the furnace temperature to be 830-870 DEG C to conduct secondary deposition diffusion. A multi-level PN knot structure formed after diffusion can ensure good ohmic contact with a metal gate wire on the one hand, and can have good blue response on the other hand; in addition, a PN knot formed by the method has great knot depth, and the possibility that the PN knot is burnt through, subjected to leakage of electricity and composited can be reduced.

Description

Technical field: [0001] The invention relates to a crystalline silicon solar cell, in particular to a three-step temperature-variable diffusion process for the crystalline silicon cell. Background technique: [0002] Diffusion-made PN junction is a core process in the production of crystalline silicon cells. The performance of the PN junction has a great influence on the photoelectric conversion efficiency of the cell and the long-term service quality of the cell. Therefore, in order to obtain high photoelectric conversion efficiency and good quality, it is necessary to prepare a stable and uniform PN junction with excellent performance. [0003] In order to improve the conversion efficiency of crystalline silicon solar cells, the current production method of PN junctions in general enterprises is a shallow junction high square resistance process. However, the shallow junction high square resistance process has three fatal defects: one is high square resistance, and the ohm...

Claims

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Application Information

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IPC IPC(8): C30B31/18H01L31/18
CPCY02P70/50
Inventor 何晨旭杨雷殷海亭凌振江陈阳泉王冬松王步峰
Owner REALFORCE POWER
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