Double-layer isolation longitudinal stacked semiconductor nanowire MOSFET (Metal Oxide Semiconductor Field Effect Transistor)
A vertical stacking, semiconductor technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of difficult process, limited device current driving capability, inability to adjust the gate work function, etc., to achieve high device integration, improve electrical performance, the effect of increasing the current drive capability of the device
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[0047] In order to describe in detail the technical content, structural features, achieved objects and effects created by the present invention, the following will be described in detail with reference to the embodiments and the accompanying drawings. Wherein, the first semiconductor nanowire group may include a plurality of first semiconductor nanowires arranged in a vertical stack. In the embodiment and the drawings, three are taken as an example, the second semiconductor nanowire group may include a plurality of first semiconductor nanowires. For the second semiconductor nanowires arranged in a vertical stack, three are taken as an example in the embodiment and the drawings.
[0048] Please refer to FIG. 1( a ), FIG. 1( b ), and FIG. 1( c ). FIG. 1( a ) is a schematic top view of the double-layer isolated vertical stacked semiconductor nanowire MOSFET of the present invention. Fig. 1(b) is a schematic cross-sectional view of Fig. 1(a) along the X-X' direction. Fig. 1(c) is...
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