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Packaging-first and etching-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit

A three-dimensional circuit, sealing first and etching later technology, which is applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the problems of great differences in material characteristics, stress deformation, and reliability levels that affect reliability and safety capabilities. Achieve the effects of reducing environmental pollution, improving safety, and reducing costs

Active Publication Date: 2012-10-10
JCET GROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0019]3. Glass fiber itself is a kind of foaming material, so it is easy to absorb moisture and moisture due to the storage time and environment, which directly affects the reliability and safety ability or is the level of reliability;
[0020] 4. The surface of the glass fiber is covered with a copper foil metal layer thickness of about 50-100 μm, and the etching distance between the metal layer line and the line can only achieve an etching gap of 50-100 μm due to the characteristics of the etching factor (see Figure 133 , the best production capacity is that the etching gap is approximately equal to the thickness of the etched object), so it is impossible to truly design and manufacture high-density circuits;
[0022]6. Also because the entire substrate material is made of glass fiber, the thickness of the glass fiber layer is obviously increased by 100~150μm, and it cannot be really ultra-thin encapsulation;
[0023]7. Due to the large difference in material characteristics (expansion coefficient) of the traditional glass fiber plus copper foil technology, it is easy to cause stress deformation in the harsh environment process, directly Affects the accuracy of component loading and the adhesion and reliability of components and substrates

Method used

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  • Packaging-first and etching-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit
  • Packaging-first and etching-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit
  • Packaging-first and etching-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0145] Embodiment 1, no base island

[0146] Step 1. Take the metal substrate

[0147] see figure 1 , take a metal substrate with a suitable thickness, the material of the metal substrate can be changed according to the function and characteristics of the chip, for example: copper, iron, nickel-iron or zinc-iron;

[0148] Step 2. Pre-plating copper on the surface of the metal substrate

[0149] see figure 2 , electroplating a layer of copper film on the surface of the metal substrate, the purpose is to serve as a basis for subsequent electroplating, and the electroplating method can be electroless plating or electrolytic plating;

[0150] Step 3: Paste the photoresist film

[0151] see image 3 , using the photoresist film sticking equipment to complete the coating of the photoresist film on the front and back of the metal substrate of the pre-plated copper film in step 2, and the photoresist film can be a wet photoresist film or a dry photoresist film;

[0152] Step 4...

Embodiment 2

[0227] Embodiment 2, there is base island

[0228] Step 1. Take the metal substrate

[0229] see Figure 41 , take a metal substrate with a suitable thickness, the material of the metal substrate can be changed according to the function and characteristics of the chip, for example: copper, iron, nickel-iron or zinc-iron;

[0230] Step 2. Pre-plating copper on the surface of the metal substrate

[0231] see Figure 42 , electroplating a layer of copper film on the surface of the metal substrate, the purpose is to serve as a basis for subsequent electroplating, and the electroplating method can be electroless plating or electrolytic plating;

[0232] Step 3: Paste the photoresist film

[0233] see Figure 43 , using the photoresist film sticking equipment to complete the coating of the photoresist film on the front and back of the metal substrate of the pre-plated copper film in step 2, and the photoresist film can be a wet photoresist film or a dry photoresist film;

[02...

Embodiment 3

[0309] Embodiment 3, there is an electrostatic discharge ring with a base island

[0310] Step 1. Take the metal substrate

[0311] see Figure 81 , take a metal substrate with a suitable thickness, the material of the metal substrate can be changed according to the function and characteristics of the chip, for example: copper, iron, nickel-iron or zinc-iron;

[0312] Step 2. Pre-plating copper on the surface of the metal substrate

[0313] see Figure 82 , electroplating a layer of copper film on the surface of the metal substrate, the purpose is to serve as a basis for subsequent electroplating, and the electroplating method can be electroless plating or electrolytic plating;

[0314] Step 3: Paste the photoresist film

[0315] see Figure 83 , using the photoresist film sticking equipment to complete the coating of the photoresist film on the front and back of the metal substrate of the pre-plated copper film in step 2, and the photoresist film can be a wet photoresist...

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Abstract

The invention relates to a packaging-first and etching-later manufacturing method for a chip formal double-surface three-dimensional circuit. The method comprises the following technology steps of taking a metal substrate; pre-plating copper material on the surface of the metal substrate; carrying out the operation of pasting a photo-resisting film; removing a part of the photo-resisting film from the front surface of the metal substrate; electro-plating an inert metal circuit layer; electro-plating a metal circuit layer; packaging; carrying out the operation of pasting the photo-resisting film; tapping on the surface of plastic package material; electro-plating the metal circuit layer; coating bonding materials; installing a chip; bonding with metal wires; packaging; carrying out the operation of pasting the photo-resisting film; chemical-etching; electro-plating the metal circuit layer; packaging; tapping on the surface of plastic package material; digging a groove on the surface of the plastic package material; electro-plating the metal circuit layer; coating a circuit screen plate; pre-processing of metallization; removing the metal screen plate; electro-plating the metal circuit layer; packaging; tapping on the surface of plastic package material; cleaning; implanting a metal ball; and cutting a finished product. The method disclosed by the invention has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of a packaging body are increased, the environment pollution is reduced, and the design and the manufacturing of a high-density circuit can be really realized.

Description

technical field [0001] The invention relates to a double-sided three-dimensional circuit chip front-mounting-first-sealing-then-etching manufacturing method and its packaging structure, belonging to the technical field of semiconductor packaging. Background technique [0002] The manufacturing process flow of the traditional high-density substrate package structure is as follows: [0003] Step 1, see Figure 121 , take a substrate made of glass fiber material, [0004] Step two, see Figure 122 , opening holes at desired locations on the fiberglass substrate, [0005] Step three, see Figure 123 , coated with a layer of copper foil on the back of the glass fiber substrate, [0006] Step 4, see Figure 124 , fill the conductive material in the position where the glass fiber substrate is punched, [0007] Step five, see Figure 125 , coated with a layer of copper foil on the front of the glass fiber substrate, [0008] Step six, see Figure 126 , coated with a photore...

Claims

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Application Information

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IPC IPC(8): H01L21/48H01L21/56H01L23/31
CPCH01L24/97H01L2224/48091H01L2224/73265H01L2224/97H01L2924/01322H01L2924/181H01L2924/00014H01L2224/85H01L2924/00H01L2924/00012
Inventor 王新潮李维平梁志忠
Owner JCET GROUP CO LTD
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