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Vision processing device based on multi-level parallel processing

A parallel processing and visual processing technology, applied in the field of visual processing, can solve difficult problems such as processing capacity, power consumption, and real-time balance

Active Publication Date: 2015-11-04
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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Problems solved by technology

[0003] With the rapid development of information technology in recent years, hardware systems using large-scale high-performance field programmable gate arrays (FPGAs), digital signal processors (DSPs) and embedded processors are becoming research hotspots. architecture, it is still difficult to achieve a balance in processing power, power consumption, and real-time aspects

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  • Vision processing device based on multi-level parallel processing
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  • Vision processing device based on multi-level parallel processing

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Embodiment Construction

[0016] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the following further describes the present invention in detail with reference to specific embodiments and drawings.

[0017] Such as figure 1 Shown is a schematic structural diagram of a vision processing device based on multi-level parallel processing. The vision processing device includes an image processor for collecting physical signals, an image input module for transmitting image data, multiple different parallelism and calculations The capable parallel processing arrays 10, 11, and 12 are used to perform low, medium, and high-level processing on images, as well as the reduced instruction set processor subsystem 14. With the support of a low-level parallel processing unit array with single-cycle multi-instruction execution capability, the vision processing device can process a certain frame of image while reading the next frame of image, concealing the exposure time...

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Abstract

The invention discloses a visual processing device based on multi-layer parallel processing. The device comprises a high speed image sensor array, multiple layers of processor unit arrays and a reduced instruction-set computer (RISC) microprocessor subsystem. An image sensor is used for acquiring images of an actual world, a bottommost low-level processor unit array has a highest degree of parallelism and a relatively weak operational capability, and the degree of parallelism of the processor arrays is gradually lowered and the operational capability of the processor arrays is gradually improved with increasing of layers. A tight coupling between a hardware structure and various image processing algorithms with different degrees of parallelism and algorithm complexity is facilitated by the aid of the layered architecture. A RISC processor is used for performing system control and scheduling of image processing threads. By means of the visual processing device based on the multi-layer parallel processing, the system has high flexibility and high data throughput rate, a multi-thread concurrent working mode is achieved, image processing capacity is greatly improved, and speeds are greatly increased.

Description

Technical field [0001] The present invention relates to the technical field of vision processing, and in particular to a vision processing device based on multi-level parallel processing, which is used to realize various image processing tasks flexibly and at high speed. Background technique [0002] Image processing technology is widely used in military, industrial, and civilian fields, such as target tracking, face recognition, gait recognition, gesture recognition, robot vision, etc. How to realize high-speed real-time image processing is an important issue in the development of science and technology. Image processing has the characteristics of large amount of data and large amount of calculation. Even a personal computer with strong processing capability cannot meet the real-time application requirements for some image processing tasks. Large-scale computers have powerful processing capabilities and can improve real-time performance to a certain extent, but their power cons...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T1/00G06T1/20
Inventor 杨杰吴南健石匆龙希田
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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