Method for manufacturing QFN (quad flat no-lead) package device

Abstract

The invention discloses a method for manufacturing a QFN (quad flat no-lead) package device. The chip load and pins of the manufactured QFN package device do not need to be based on a lead frame manufactured in advance, independent chip carriers and pins with step structures are formed by organically combining electroplating, mechanical grinding and cutting methods in a package technical process and are mechanically supported and protected by configured insulated filling materials in the package technical process, the insulated filling materials and plastic package materials are used for secondary coating and sealing, and the manufactured QFN package device has high I/O (input/output) density and fine reliability.

Description

technical field [0001] The invention relates to the technical field of manufacturing semiconductor components, in particular to a method for manufacturing a quadrilateral flat no-lead package with high I / O density. Background technique [0002] With the development of electronic products such as mobile phones and notebook computers towards miniaturization, portability, ultra-thinness, multimedia and low-cost requirements for popularization, high-density, high-performance, high-reliability and low-cost packaging forms and Its assembly technology has been developed rapidly. Compared with expensive BGA and other packaging forms, the new packaging technology developed rapidly in recent years, that is, Quad Flat Non-lead Package (QFN) package, has good thermal and electrical properties, small size, Many advantages such as low cost and high productivity have triggered a new revolution in the field of microelectronic packaging technology. [0003] Figure 1A and Figure 1B Respe...

AI Technical Summary

Problems solved by technology

[0004] With the improvement of IC integration and the continuous enhancement of functions, the number of I/Os of ICs increases, and the number of I/O pins of corresponding electronic packages also increases accordingly. The pins of the ring are arranged around the chip carrier, which limits the increase in the number of I/Os and cannot meet the needs of high-density ICs with more I/Os.

Even if the traditional QFN package with non-step structure design has multi-turn pins, it cannot effectively lock the plastic packaging material, resulting in low bonding strength between the lead frame and the plastic packaging material, which is easy to cause delamination and even lead-out of the lead frame and plastic packaging material. The feet or the chip carrier fall off, and the moisture cannot be effectively prevented from diffusing into the electronic package along the interface between the lead frame and the plastic packaging material, which seriously affects the reliability of the package.

Even if the traditional QFN package has a stepped s

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