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Fin field effect transistor and method of forming the same

A fin field effect and transistor technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve device performance problems and other problems, achieve stable performance, improve carrier mobility, and gate leakage current. small effect

Active Publication Date: 2016-08-31
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, as the process node is further reduced, there are problems with the device performance of the prior art FinFET

Method used

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  • Fin field effect transistor and method of forming the same
  • Fin field effect transistor and method of forming the same
  • Fin field effect transistor and method of forming the same

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Effect test

Embodiment Construction

[0043] As mentioned in the background, the performance of the prior art FinFETs is not stable.

[0044] After research, it was found that after research, the inventor found that there are many reasons that affect the performance stability of the fin field effect transistor. One of the reasons is: the prior art forms fins 14 on the surface of the semiconductor substrate (such as figure 1As shown), doping ions from the top surface of the fin 14 to the inside of the fin 14 to improve the carrier mobility in the channel region of the fin field effect transistor, as figure 2 as shown in figure 2 The middle X-axis represents the concentration of dopant ions in the fin 14, and the Y-axis represents the distance from any point in the fin 14 to the top of the fin 14. In the case of ideal doping, it is desired that the ion concentration after doping be within the fin 14 As shown in the curve 100, the dopant ions are concentrated in the middle of the fin 14, while the ion concentratio...

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Abstract

The invention discloses a fin type field effect transistor and a forming method of the fin type field effect transistor. The forming method of the fin type field effect transistor includes the steps that a semiconductor substrate is provided, the surface of the semiconductor substrate is covered with an epitaxy intrinsic layer, a rigid mask layer is formed on the surface of the epitaxy intrinsic layer, and the rigid mask layer is provided with an opening exposed out of the epitaxy intrinsic layer; dry etching is performed on the epitaxy intrinsic layer along the opening, so that a fin portion is formed, the width of the top of the fin portion is smaller than that of part of the rigid mask layer of the surface of the fin portion, and the included angle of the side wall of the fin portion and the surface of the semiconductor substrate is smaller than 90 degrees; ions are doped into the fin portion through the opening, the doped ions are mainly distributed in the middle of the fin portion, and few ions are distributed at the bottom of the fin portion. According to the formed fin type field effect transistor, a grid is small in current leakage, and the performance of the transistor is stable.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a fin field effect transistor and a forming method thereof. Background technique [0002] With the continuous development of semiconductor process technology, the process node is gradually reduced, and the gate-last (gate-last) process has been widely used to obtain an ideal threshold voltage and improve device performance. However, when the feature size (CD, Critical Dimension) of the device is further reduced, even if the gate-last process is adopted, the structure of the conventional MOS field effect transistor can no longer meet the requirements for device performance. Widespread concern. [0003] Fin field effect transistor (Fin FET) is a common multi-gate device, figure 1 A schematic diagram of a three-dimensional structure of a fin field effect transistor in the prior art is shown. like figure 1 As shown, it includes: a semiconductor substrate 10, o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78H01L29/10
CPCH01L29/7853
Inventor 三重野文健
Owner SEMICON MFG INT (SHANGHAI) CORP
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