1553B bus protocol module based on DSP
A bus protocol, DSPF2812 technology, applied in the field of 1553B bus protocol module, can solve problems such as complex peripheral circuits, and achieve the effects of convenient use, simple connection, great flexibility and reliability
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0017] refer to Figure 1-2 . The DSP-based 1553B bus protocol module of the present invention includes five parts: a 1553B bus interface circuit, a logic synthesis circuit, a level conversion circuit, a dual-port RAM and a GJB289A bus protocol chip circuit.
[0018] 1553B bus interface circuit adopts JBU-61580 protocol chip. JBU-61580 integrates dual transceiver logic, codec, protocol logic, memory management and interrupt control logic, and also provides a 4K word (16bit) internal shared static RAM and a buffer interface with the processor bus; The software interface includes 17 internal operation registers, 8 test registers and a shared memory address space of 64K words; it works in the buffer mode and occupies a 16-bit data bus and a 12-bit address bus, and all its control signals are controlled by the decoding circuit of the FPGA Generated, communicate with F2812 through interrupt mode, so the interrupt pin INT of BU-61580 is connected with the external interrupt XINT1 ...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 