Method for preparing copper cylinder salient points

Abstract

The invention discloses a method for preparing copper cylinder salient points. With the adoption of the local metal seed layer technology and the multilayer sensitive dry film technology, the method includes the steps that a conductive metal seed layer is prepared on a dielectric layer; a bonding pad, an outer-layer circuit pattern and an electroplating lead are prepared on the metal seed layer; the metal seed layer is etched, a local metal seed layer of a salient point region where the bonding pad is located is reserved, the portions, except for the salient point region, of the metal seed layer are all removed, and therefore a first substrate is obtained; a green oil layer is prepared on the first substrate, the portion, in the salient point region, of the green oil layer is removed, and therefore a second substrate is obtained; multiple layers of dry films are sequentially prepared on the second substrate, photoetching is then conducted on the dry films on the bonding pad of the salient point region until the bonding pad of the salient point region is exposed, etching blind holes are formed in the bonding pad, and therefore a third substrate is obtained; the third substrate is electroplated, the etching blind holes in the bonding pad are plated with copper, the portions, around the dry films and the bonding pad, of the local metal seed layer are then removed, and therefore copper cylinder salient points are generated on the bonding pad.

Description

technical field [0001] The invention relates to the technical field of packaging, in particular to a method for preparing copper pillar bumps on a packaging substrate or a PCB. Background technique [0002] In COB packaging and FC packaging, due to the difference in thermal expansion coefficient between the substrate and the chip, when the temperature changes, the connection bumps between the chip and the substrate will generate greater stress. In order to reduce the thermal stress and improve the reliability of the package Sexuality, columnar bumps are often used to connect chips and substrates. Compared with solder bumps, the height of copper pillar bumps is larger, and copper has better toughness, which greatly relieves the stress on the bumps. [0003] In the prior art, most of the copper pillar bumps are prepared on the chip, and then the chip with the copper pillar bumps is bonded to the substrate or PCB. In this process, the copper pillar bumps are formed on the chip...

AI Technical Summary

Problems solved by technology

[0003] In the prior art, most of the copper pillar bumps are prepared on the chip, and then the chip with the copper pillar bumps is bonded to the substrate or PCB. In this process, the copper pillar bumps are formed on the chip. However, its diameter and height are greatly limited. At the same time, due to the electroplating of copper pillar bumps on the wafer, its efficiency and cost are relatively high, and it is not suitable for preparing copper pillar bumps with large diameters and high aspect ratios.

[0004] At the same time, the existing substrate bump technology adopts the method of electroplating leads, and each pad under the bump to be electroplated must lead out an electroplating lead to ensure its conductivity, which increases the difficulty of preparation and the complexity of graphics degree

At the same time, after the electroplating is completed, the electroplating lead cannot be completely removed, which further increases the complexity of the process

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