Wet etching device

A technology of wet etching and waiting to be etched, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc. It can solve the problems of CMP equipment output rate decline, insufficient control accuracy, and cost increase, so as to reduce the cost of consumables , Accelerate the etching speed and improve the output rate

Inactive Publication Date: 2015-02-11
马悦 +5
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Problems solved by technology

This method is difficult to recover the polishing liquid in situ on the polishing equipment
Another limitation of electropolishing is that the polishing rate varies with the pattern density on the semiconductor device substrate. Therefore, the pattern density on the semiconductor device substrate must be designed through the device integration process to control the polishing rate. In standard semiconductor device production Difficult to apply in process
[0003] The hole size of the 3D copper interconnection technology is doubled compared with the traditional interconnection hole and trench size, so the excess copper left in the copper filling process step is much larger than the excess copper removed by CMP in the traditional interconnection process, so CMP consumables Increased cost and decreased output of CMP equipment
The copper film can also be removed by wet etching. For example, a mixture of sulfuric acid and hydrogen peroxide in a certain ratio can be used to etch the copper film. However, the control accuracy of this method is not enough, and it is easy to cause holes or grooves on the semiconductor device substrate. In addition, the copper film etched by this method is covered by a layer of oxide layer, which affects the performance of the final device

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Embodiment Construction

[0016] The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments, where the schematic embodiments and descriptions of the present invention are used to explain the present invention, but not to limit the present invention.

[0017] figure 1 It is a schematic diagram of a wet etching device provided by an embodiment of the present invention. The device has a semiconductor processing substrate 1003 , a processing chamber 1001 , a shower unit 1004 , a driving device 1007 , an etching liquid supply unit 1005 , and an etching liquid discharge unit 1014 . The semiconductor workpiece substrate 1003 has a surface to be etched, and the surface to be etched is a metal coating surface. The processing chamber 1001 has a substrate carrying unit 1002 inside, and the substrate carrying unit 1002 carries the substrate 1003 of the semiconductor workpiece. The spray unit 1004 has at least one etching liquid outlet, the spray...

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Abstract

The invention provides a wet etching device. The wet etching device is provided with a semiconductor processing piece substrate, a processing cavity, a substrate bearing unit, etching liquid, a spraying unit, a driving device, an etching liquid supplying unit, an etching liquid discharging unit, a generation electrode cavity and a recycling electrode cavity. According to the wet etching device provided by the invention, high-valence metal cations in the etching liquid can be regenerated in situ, copper ions can be recycled, recycle of the etching liquid is realized, greater environmental protection effect is realized, and meanwhile, the consumable cost is reduced; the wet etching device can also be used for applying source wave energy to the etching liquid, the etching speed can be quickened, and the production rate is increased.

Description

technical field [0001] The invention relates to a wet etching device, in particular to a device for wet etching a metal thin film on a substrate. Background technique [0002] The interconnection technology in VLSI manufacturing technology has undergone two technological changes in the past ten years, one is the replacement of aluminum interconnection technology by copper interconnection technology, and the other is the introduction of 3D copper interconnection technology. That is, through silicon channel (through silicon vias, TSV for short) technology. At present, these technologies have been widely used in the manufacture of integrated circuit chips for computers, communications, automotive electronics and other consumer products. Whether it is traditional copper interconnection technology or 3D copper interconnection technology, the formation of copper interconnection includes the following steps: (1) forming holes or trenches on the semiconductor device substrate, (2) ...

Claims

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Application Information

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Patent Type & AuthorityApplications(China)
IPC IPC(8): H01L21/3213
CPCH01L21/6708
Inventor马悦何川施广涛黄允文顾岩阳诗友
Owner马悦