Flash memory device and programming method thereof
A flash memory device and substrate technology, applied in static memory, read-only memory, instruments, etc., can solve the problems of flash memory device upgrade and critical size reduction, large depletion layer width, device punch-through, etc., to achieve resistance to threshold voltage drift, Effect of increasing cell density and reducing readout errors
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Embodiment 1
[0026] In this implementation, the control gate 50 and the floating gate 60 are made of polysilicon, the control gate 50 has a length of 10nm and a height of 90nm, and the floating gate 60 has a height of 70nm and a length of 40nm; the first insulating layer 40 and the second insulating layer 70 are made of two Silicon oxide, the thickness of the first insulating layer 40 is 2.5 nm, and the length of the second insulating layer 70 is 3 nm. The manufacturing process of the device can be selected from the top-down technology compatible with the standard CMOS process.
[0027] The flash memory memory provided by the present invention adopts a cylindrical substrate structure, on which the gate is covered, and the ends are led out through contact wires for applying substrate voltage. Compared with the prior art, the use of a cylindrical structure can enable the voltage of the control gate and the floating gate to better control the channel, reduce the percentage of the total deplet...
Embodiment 2
[0030] The voltage value applied to the control gate 50 is equal to the threshold voltage value of the flash memory device, the voltage value applied to the floating gate 60 is twice the threshold voltage value of the flash memory device, the voltage applied to the drain terminal 30 is 4V, and the voltage applied to the substrate 10 is 5V. A voltage of 0V is applied to the source terminal 20 .
[0031] The compiling principle of the present invention is: the voltage value applied to the control gate 50 is equal to the threshold voltage value of the flash memory device, and a thinner channel electron layer is induced in the lower substrate region. The voltage applied to the floating gate 60 is twice the threshold voltage of the flash memory device, and a thicker channel electron layer is induced in the lower channel electron layer. A high voltage is applied to the substrate 10 to accelerate the electrons in the thinner channel electron layer, generate hot electrons with suffici...
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