A flash memory device and programming method thereof

Abstract

The invention provides a flash memory device and a programming method thereof. The flash memory device comprises a substrate, wherein the substrate is of a cylindrical structure; a source end and a drain end are respectively arranged at the end parts of the substrate; a grid is coats the middle of the substrate; a first insulating layer is arranged between the grid and the substrate; the grid comprises a control grid and a floating grid parallel to each other; and contact lines are respectively led out of the two ends and are used for applying voltage to the substrate. According to the programming method of the flash memory device, by utilizing a back grid bias assisted hot electron generating mechanism, low voltage can be applied to the drain end, the key size of a split floating grid flash memory is effectively shortened, and the cell density of a flash memory array is increased, namely the memory capacity and density of the flash memory are increased. The movement of hot electrons is assisted by applying bias voltage, enough energy crossing an oxide layer is provided so as to finish compiling, the compiling efficiency of the flash memory is improved, and the compiling current power consumption is reduced.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuits and its manufacture, in particular to a flash memory device and its programming method. Background technique [0002] In semiconductor storage devices, flash memory is a non-volatile memory, and belongs to erasable programmable read-only memory (EPROM). Generally, a flash memory has two gates (a floating gate and a control gate), wherein the floating gate is used to store charges, and the control gate is used to control data input and output. The position of the floating gate is below the control gate, and it is in a floating state because it is not connected to the external circuit. The advantage of flash memory is that it can erase the entire memory block, and the erasing speed is fast, only about 1 to 2 seconds. Generally speaking, flash memory has a split gate structure or a stacked gate structure or a combination of the two structures. Due to its special structure, split-ga...

AI Technical Summary

Problems solved by technology

[0005] However, there is another problem in the technical solution in the above-mentioned patent: because the voltage applied to the drain terminal is relatively high, the width of the depletion layer extending from the drain terminal to the substrate is relatively large, and the source terminal and the depletion region are easily exposed to high voltage. The bottom contacts together, resulting in device punchthrough and failure, that is, channel punchthrough effect (Channel punchthrough effect), which is a phenomenon in which the depletion region of the source end and the drain end are connected. This defect often limits the process of flash memory devices. Upgrading of technology nodes and shrinking of critical dimensions

Images