Power semiconductor device and manufacturing method thereof

Abstract

The invention discloses a power semiconductor device. A drift region is formed by combining a superjunction drift region and a single drift region, so that the device can achieve parallel connection of a superjunction device and a single drift region device; the superjunction drift region consists of a plurality of alternately arranged N-type thin layers and P-type thin layers; and the single drift region consists of an N-type doped first N-type layer. The superjunction drift region can optimize specific on resistance of the device, so that low specific on resistance can be obtained; and the reverse recovery characteristic of the device in a shutoff process can be softened, the reverse recovery characteristic and the impact resistance of the device are improved, and recovery current impact is reduced by utilizing the characteristic of reverse recovery characteristic softening of the single drift region in the shutoff process of the device. The invention further discloses a manufacturing method of the power semiconductor device.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor integrated circuits, in particular to a power semiconductor device; the invention also relates to a method for manufacturing the power semiconductor device. Background technique [0002] The super junction MOSFET adopts a new voltage-resistant layer structure, and uses a series of alternately arranged P-type semiconductor thin layers and N-type semiconductor thin layers to combine the P-type semiconductor thin layers and N-type semiconductor thin layers at a lower voltage in the off state. The thin layer of semiconductor is depleted to achieve mutual compensation of charges, so that the thin layer of P-type semiconductor and thin layer of N-type semiconductor can achieve high breakdown voltage under high doping concentration, so as to obtain low on-resistance and high breakdown at the same time voltage, breaking the theoretical limit of traditional power MOSFETs. In U.S. Patent US521627...

AI Technical Summary

Problems solved by technology

[0004] In the super junction process, due to the use of alternating P / N thin layers, the body diode of the power semiconductor device, that is, the diode formed between the P-type semiconductor thin layer and the N-type semiconductor thin layer, is at a lower reverse bias voltage such as 50 Vds will completely deplete the P-type semiconductor thin layer and the N-type semiconductor thin layer, which makes the diode have a very hard reverse recovery characteristic. This hard reverse recovery characteristic causes the recovery current of the device to change sharply. The fluctuations in the reverse recovery are severe, causing electromagnetic noise (EMI NOISE) in the circuit, which affects the work of other devices in the circuit. In this regard, power semiconductor devices are not as good as conventional MOSFET devices. Conventional MOSFET devices The drift region does not have a P / N thin layer structure, but the entire drift region is N-doped, because the depletion of the N-drift region of a conventional MOSFET device always expands with the increase of the voltage (Vds), reverse recovery properties are soft

[0005] In terms of process selection, multiple epitaxial growth and lithography and implantation processes have complex, long manufacturing cycle and high cost problems. In the trench filling process, it is necessary to deposit on a highly doped substrate before the trench process. The epitaxial layer with a thickness of tens of microns also increases the cost of the process

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