A kind of lateral diffusion semiconductor device and its preparation method

Abstract

The present invention relates to a laterally diffused semiconductor device and its preparation method. The method comprises: providing a semiconductor substrate in which a laterally isolated body region and a drift region are formed; There are mutually isolated gate structures and dummy gate structures, wherein the gate structure is partly located on the body region, partly located on the drift region, and the dummy gate structure is located on the drift region; performing a source-drain implantation step to form a source region in the body region on one side of the gate structure, and form a drain region in the drift region on the side of the dummy gate structure away from the source region; A source metal layer and a drain metal layer are respectively formed above the source region and the drain region to form an electrical connection, wherein the source metal layer extends toward the drain region to form a field plate structure. The advantages of the present invention are: (1) There is no STI structure in the new structure, which can greatly reduce the on-resistance Rdson.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular, the invention relates to a lateral diffusion semiconductor device and a preparation method thereof. Background technique [0002] With the rapid development of the semiconductor industry, PIC (Power Integrated Circuit, power integrated circuit) is continuously used in many fields, such as motor control, flat panel display drive control, computer peripheral drive control, etc., the PIC circuit used Among power devices, DMOS (Double Diffused MOSFET, Double Diffused Metal Oxide Semiconductor Field Effect Transistor) has the characteristics of high operating voltage, simple process, and easy compatibility with low-voltage CMOS (Complementary Metal Oxide Semiconductor, Complementary Metal Oxide Semiconductor) circuits. received widespread attention. [0003] There are two main types of DMOS: vertical double-diffused MOSFET (VDMOS) and lateral double-diffused MOSFET (LDMOS). LDMOS is wide...

AI Technical Summary

Problems solved by technology

[0005] The structure of LDMOS described in the prior art is as Figure 1a Said, the structure includes a semiconductor substrate 101, a body region 103 and a drift region 102 located in the semiconductor substrate 101, the body region 103 and the drift region 102 are isolated from each other, and the LDMOS further includes a gate pole structure, the gate structure is partly located on the body region 103, and partly located on the drift region 102, in the drift region 102, a shallow trench isolation structure is formed under the gate structure, In the body region 103 and the drift region 102, source and drain regions are formed on both sides of the gate structure, wherein the drain region is located outside the shallow trench isolation, away from one side of the gate structure. On the side, with the improvement of device performance requirements, in order to increase the breakdown voltage of conventional LDMOS, the length Fx of STI is mostly extended, but after increasing the length Fx of STI, the on-state resistance (Rdson) will increase rapidly

The drift region of conventional LDMO needs to partially overlap with the gate, which increases the parasitic capacitance Cgd and limits the switching speed of LDMOS

[0006] In addition, in the prior art, there are such Figure 1b In the shown structure, the body region 103, the drift region 102, the gate structure, and the source and drain are also formed in the LDMOS, and the difference is that no Figure 1a The shallow trench isolation structure described in , but a SAB104 is formed above the substrate of the shallow trench isolation structure to separate the gate structure and the drain region, so as to reduce the on-state resistance (Rdson ), but the structure brings new problems, the structure will affect the breakdown voltage of the device

[0007] Therefore, in order to improve the performance of the LDMOS device in the prior art, the structure and the preparation method have been improved, but there are still many disadvantages. After the breakdown voltage of the device is increased, the on-state resistance (Rdson) and parasitic The capacitance Cgd increases rapidly; the on-state resistance (Rdson) is reduced, and then the breakdown voltage of the device is affected, which cannot solve the above problems at the same time, so it is necessary to improve the preparation method and structure in the prior art

Images