A silicon carbide vdmos device

Abstract

The invention belongs to the technical field of semiconductors, and in particular relates to a silicon carbide VDMOS device. Aiming at the composite gate dielectric structure provided by the SiC VDMOS device, the present invention adopts a high dielectric constant gate dielectric / SiO2 stacking structure above the channel, SiO2 is all used above the JFET region, and the total physical thickness of the gate dielectric above the channel and the JFET region is the same. When the device is in the forward conduction state, the introduction of a high dielectric constant material into the gate dielectric will increase the physical thickness of the gate dielectric, thus reducing the electric field strength in the gate dielectric without increasing the threshold voltage; when the device is in the blocking state In the state, the maximum surface electric field intensity is located in the JFET region, and the thick SiO2 above this region can reduce the maximum surface electric field, thereby reducing the electric field intensity in SiO2. The invention reduces the FN tunneling current in the SiC VDMOS device by reducing the electric field strength in the gate dielectric, and effectively improves the reliability of the gate oxide layer.

Description

Technical field [0001] The invention belongs to the field of semiconductor technology, and specifically relates to a silicon carbide VDMOS device. Background technique [0002] Silicon carbide (SiC) has the characteristics of large forbidden band width, high critical breakdown electric field, high thermal conductivity and high electron saturation drift speed, so it has very broad application prospects in the field of high power, high temperature and high frequency power electronics. At present, among the field effect transistors with SiC as the substrate, the vertical double diffused metal oxide semiconductor field effect transistor (VDMOS) is one of the objects that have been widely studied. [0003] Compared with other wide-gap semiconductor materials (such as GaN), SiC has a very obvious advantage that SiO can be directly formed by thermal growth. 2 (Silica), which allows silicon carbide devices to easily inherit the MOS (metal oxide semiconductor) structure and related technolo...

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Problems solved by technology

In this way, the physical thickness of the gate dielectric can be increased without reducing the carrier barrier height at the interface, so the purpose of reducing the FN tunneling current can be achieved, but the SiO in this gate structure 2 Usually very thin, when the VDMOS device breaks down reversely, a large electric field will still be generated on the surface of the JFET region, where the surface gate dielectric is likely to break down in advance

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